GC5325SEK Datasheet, PDF (1/24 Pages) Texas Instruments – GC5325 Wideband Digital Predistortion Transmit Processor

GC5325
www.ti.com .............................................................................................................................................................................................. SLWS215 – JANUARY 2009
GC5325 Wideband Digital Predistortion Transmit Processor
FEATURES
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•23 Integrated CFR and DPD Functions
• Up to 20-MHz Combined Signal Bandwidth
• CFR: Typically Meets 3GPP TS 25.141 <6.5 dB
PAR, <8 dB PAR for 802.16e Signals
• DPD: Memory Compensation, Typical ACLR
Improvement of 20 dB to 30 dB or More
• Transmit- and Feedback-Channel Equalizers
• 352-Ball S-PBGA Package, 27 mm × 27 mm
• 1.2-V Core, 3.3-V I/O
• Typical Power Consumption = 1.9 W
SYSTEM BLOCK DIAGRAM
DAC5682Z
Baseband
Input
GC5325
CFR–DPD
DAC
I/Q
DAC
CDCM7005
• Flexible DSP Algorithm Supports Existing and
Emerging Wireless Standards
• Supports Direct Interface to TI High-Speed
Data Converters
APPLICATIONS
• 3GPP (W-CDMA, TD-SCDMA) Base Stations
• 3GPP2 (CDMA2000) Base Stations
• WiMAX and WiBRO (OFDMA) Base Stations
• Multicarrier Power Amplifiers (MCPAs)
TRF3703
I/Q
Modulator
LO
LPA
TRF3761
HPA
'C6727
DSP
ADC
ADS6149
THS9001 Mixer
B0278-02
DESCRIPTION
The GC5325 is a wideband digital predistortion transmit processor that includes a crest factor reduction (CFR)
block and a digital predistortion (DPD) block with its associated feedback chain and capture buffers. The GC5325
processes composite input bandwidths of up to 20 MHz and processes DPD sample rates of up to 140 MHz. The
GC5325 accepts a composite signal over an interleaved parallel interface at a data rate of up to 140 MSPS. The
GC5325 CFR block reduces the peak-to-average ratio (PAR) of wideband digital signals provided in quadrature
(I/Q) format, such as those used in third-generation (3G) code division multiple access (CDMA) wireless and
orthogonal frequency division multiple access (OFDMA) applications. The GC5325 DPD block reduces
adjacent-channel leakage ratio (ACLR), or out-of-band energy, by 20 dB to 30 dB or more. The efficiency of
follow-on power amplifiers (PAs) is substantially improved by reducing the PAR and ACLR of digital signals. The
digital-to-RF conversion can be further simplified by the fractional interpolator between the CFR and the DPD
blocks, and a bulk upconverter (BUC) in the final stage of the GC5325. This feature typically eliminates the need
for superheterodyne (dual-stage) upconversion architectures. Transmit and feedback NCO/mixers provide
additional flexibility in the system frequency planning.
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TMS320C64x, C55x, C64x are trademarks of Texas Instruments.
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All other trademarks are the property of their respective owners.
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PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009, Texas Instruments Incorporated