GC5325SEK Datasheet, PDF (2/24 Pages) Texas Instruments – GC5325 Wideband Digital Predistortion Transmit Processor

GC5325
SLWS215 – JANUARY 2009 .............................................................................................................................................................................................. www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
T_C
–40°C to 85°C
AVAILABLE OPTIONS
PACKAGED DEVICE⁽¹⁾
352-ball S-PBGA package, 27 mm × 27 mm
GC5325IZND
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
GC5325 FUNCTIONAL BLOCK DIAGRAM
GC5325
TCK
RESETB SYNC SYNC INT UPDATA UPADDR OEB RDB WRB CEB TRSTB TDO
3 ^OUT
16
10
TDI
TMS ₄
MPU Interface
JTAG
BBin
16
BBFR
MFIO[19:18]
2
(Optional;
additional
2 LSBs)
Input
Interface
CFR
Fractional
Farrow
Resampler
Circular
Limiter
FB
(LVDS)
18 Pairs
ADC
Interface
Real to Complex
(or Bypass)
Feedback
Equalizer
Feedback NL
Correction
TX
(Diff.)
19 Pairs
DAC
Interface
Bulk Interpolation
+ Mixer
Transmit
Equalizer
DPD
Capture Buffers
BB
PLL
DPD
PLL
BBCLK
DPDCLK
(LVDS)
SYNCD
(LVDS)
BB Clock Domain
DPD Clock Domain
B0279-02
2
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