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GC5325SEK Datasheet, PDF (13/24 Pages) Texas Instruments – GC5325 Wideband Digital Predistortion Transmit Processor
GC5325
www.ti.com .............................................................................................................................................................................................. SLWS215 – JANUARY 2009
GENERAL ELECTRICAL CHARACTERISTICS
Describes the electrical characteristics for the baseband interface, multifunction I/O (MFIO), DPD clock and fast sync, MPU
and JTAG interfaces over recommended operating conditions. Device is production tested at 90=C for the given specification
and characterized at –40=C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
CMOS INTERFACE
VIL
CMOS voltage input, low
VIH
CMOS voltage input, high
VOL
CMOS voltage output, low
VOH
CMOS voltage output, high
|IPU|
Pullup current
|IIN|
Leakage current
DAC INTERFACE (DAC P/N[15:0])
IOL = 2 mA
IOH = –2 mA
VIN = 0 V
VIN = 0 or VIN = VDDSHV
VO(diff)
Output differential swing,
| VO(diff) | = | VOH – VOL |
(1)
V(COMM)
Common mode voltage,
(VOH + VOL)/2
(1)
LVDS INTERFACE (FB[35:0], DPDCLK/C, SYNCD/C)
Vi
Vi(diff)
Input voltage range
Input differential voltage,
|Vpos – Vneg|
RIN
Input differential impedance
POWER SUPPLY
Idyn Core current
0 < Vi < 2000 mV
1000 mV < Vi < 1400 mV, FB[35:0] only
See (2)
MIN TYP
MAX UNIT
0.8 V
2
VDDSHV
V
0.5 V
2.4
VDDSHV
V
40 100
200 µA
5 µA
250
mV
1000
mV
0
2000 mV
250
mV
90
80
120 Ω
2.2 A
(1) HSTL output levels are measured at 675 Mb/s delay and with 100-Ω load from P to N. Drive strength set to 0x360. Contact TI for
operations above 675 Mb/s.
(2) Operating at 280 MHz core, 840 TX port, maximum filtering, nominal supplies
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): GC5325
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