BQ2019PW Datasheet, PDF (8/27 Pages) Texas Instruments – ADVANCED BATTERY MONITORIC

bq2019
ADVANCED BATTERY MONITOR IC
SLUS465E – DECEMBER 1999 – REVISED FEBRUARY 2003
APPLICATION INFORMATION
REG output (continued)
charge and discharge count operation
Table 1 shows the main counters and registers of the bq2019. The bq2019 accumulates charge and discharge
counts into two count registers: the charge count register (CCR) and the discharge count register (DCR).
Charge and discharge counts are generated by sensing the voltage difference between SR and V_SS. The CCR
or DCR independently counts, depending on the signal between pins SR and V_SS (V_SR).
During discharge, the DCR and the discharge time counter (DTC) are active. If V_SR is less than 0, indicating
a discharge activity, the DCR counts at a rate equivalent to one count per 3.05 µVH, and the DTC counts at a
rate of 1.138 counts per second (4096 counts = 1 hour). For example, if no rollover of the DTC register is
incipient, a negative 24.42 mV signal between pins SR and V_SS produces 8000 DCR counts and 4096 DTC
counts each hour. The amount of charge removed from the battery is easily calculated.
During charge, the CCR and the charge time counter (CTC) are active. If V_SR is greater than 0, indicating a
charge, the CCR counts at a rate equivalent to one count per 3.05 µVH, and the CTC counts at a rate of 1.138
counts per seconds. In this case a +24.42 mV signal produces 8000 CCR counts and 4096 CTC counts
(assuming no rollover) each hour.
The DTC and the CTC are 16-bit registers, with rollover beyond ffffh. If a rollover occurs, the corresponding bit
in the MODE/WOE register is set, and the counter increments at 1/256 of the normal rate (16 counts per hour).
While in normal operation, the internal RAM and flash registers of the bq2019 may be accessed over the HDQ
pin, as described in the section Communicating With the 2019.
For self-discharge calculation, the self-discharge count register (SCR) counts at a rate of 1 count every hour
at a nominal 25°C. The SCR count rate doubles approximately every 10°C up to 60°C. The SCR count rate is
halved every 10°C below 25°C down to 0°C. The value in SCR is useful in estimating the battery self-discharge
on the basis of capacity and storage temperature conditions.
The offset register contained in the CAL/OFFCTH, OFFCTM and OFFCTL locations stores the bq2019 offset.
At a period representing the amount of positive or negative offset, the bq2019 automatically adds an equivalent
count to either the CCR or DCR registers. The maximum uncalibrated offset for the bq2019 is ±500 µV. Care
should be taken to ensure proper PCB layout. Using OFR, the system host can cancel most of the effects of
bq2019 offset for greater resolution and accuracy.
Table 1 shows the bq2019 register address map. The remaining memory can store user-specific information
such as chemistry, serial number, and manufacturing date.
NAME
DCR
CCR
SCR
DTC
CTC
Table 1. bq2019 Counters
DESCRIPTION
Discharge count register
Charge count register
Self-discharge count register
Discharge time counter
Charge time counter
RANGE
VSR < VSS (Max. = –100 mV) 3.05 µV/LSB
VSR >VSR (Max. = +100 mV) 3.05 µV/LSB
1 count/hour at 25°C
1 count/0.8789s (default)
1 count/225s if STD is set
1 count/0.8789s (default)
1 count/225s if STC is set
RAM SIZE
16-bit
16-bit
16-bit
16-bit
16-bit
8
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