BQ2019PW Datasheet, PDF (11/27 Pages) Texas Instruments – ADVANCED BATTERY MONITORIC

bq2019
ADVANCED BATTERY MONITOR IC
SLUS465E – DECEMBER 1999 – REVISED FEBRUARY 2003
APPLICATION INFORMATION
register interface (continued)
Table 4. bq2019 Registers
HDQ
ADDRESS
0x78–0x7F
0x77
0x76
0x75
0x74
0x73
0x72
0x71
0x70
0x6F
0x6E
0x6D
0x6C
0x6B
0x6A
0x69
0x68
0x67
0x66
0x65
0x64
0x63
0x62
0x61
0x60
0x40–0x5F
0x20–0x3F
0x00–0x1F
NAME
IDROM
CAL/OFFCTH
OFFCTM
OFFCTL
—
—
—
FPA
FPD
DCRH
DCRL
CCRH
CCRL
SCRH
SCRL
DTCH
DTCL
CTCH
CTCL
MODE/WOE
CLR
FCMD
TMPH
TMPL
Flash
Flash
RAM/flash
BIT7
COMPEN
TVOS
RSVD
BIT6
BIT5
BIT4
BIT3
BIT2 BIT1 BIT0
CALREQ
DISREG
POR
8 bytes of factory-programmed ROM
CALOK CHGOFF
Flash-shadowed VFC offset bits 19–16
Flash-shadowed offset register bits 15–8
Flash-shadowed offset register bits 7–0
Reserved
Reserved
Reserved
Reserved
Program address byte
Flash program data byte
Discharge count register high byte
Discharge count register low byte
Charge count register high byte
Charge count register low byte
Self-discharge count register high byte
Self-discharge count register low byte
Discharge timer counter register high byte
Discharge timer count register low byte
Charge timer counter register high byte
Charge timer counter register low byte
STC
STD
WOE2
WOE1 WOE0 BIT0
STAT
CTC
DTC
SCR CCR DCR
Flash/control command register
Reserved
TEMP[8]
TEMP[7:0]
PAGE2, 32 bytes of flash
PAGE1, 32 bytes of flash
PAGE0, 32 bytes of flash-shadowed RAM
memory
ID ROM
The bq2019 has 8 bytes of ID ROM. This data field can be factory programmed to the customer request, insuring
a unique and secure product serialization. Contact your Texas Instruments representative for details.
flash-shadowed RAM
The host system has direct access to read and modify 32 bytes of RAM. These 32 bytes are shadowed by 32
bytes of flash to provide nonvolatile storage of battery conditions. The information stored in RAM is transferred
to flash, and the information stored in flash is transferred to RAM by writing a single command into the flash
command register (FCMD). When a power-on-reset occurs, PAGE0 of flash and three flash-shadowed offset
bytes are transferred to RAM. (The host is responsible for storing offset value in flash.) For more details, refer
to the flash command register section.
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