LM3S1969 Datasheet, PDF (615/677 Pages) Texas Instruments – Stellaris® LM3S1969 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Stellaris^® LM3S1969 Microcontroller
Table 19-1. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
62
VDD25
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals.
63
GND
-
Power Ground reference for logic and I/O pins.
64
RST
I
TTL
System reset input.
65
CMOD0
I
TTL
CPU Mode bit 0. Input must be set to logic 0 (grounded); other
encodings reserved.
PB0
I/O
TTL
GPIO port B bit 0.
66
CCP0
I/O
TTL
Capture/Compare/PWM 0.
PB1
I/O
TTL
GPIO port B bit 1.
67
CCP2
I/O
TTL
Capture/Compare/PWM 2.
68
VDD
-
Power Positive supply for I/O and some logic.
69
GND
-
Power Ground reference for logic and I/O pins.
PB2
I/O
TTL
GPIO port B bit 2.
70
I2C0SCL
I/O
OD
I²C module 0 clock.
PB3
I/O
TTL
GPIO port B bit 3.
71
I2C0SDA
I/O
OD
I²C module 0 data.
PE0
I/O
TTL
GPIO port E bit 0.
72
SSI1Clk
I/O
TTL
SSI module 1 clock
PE1
I/O
TTL
GPIO port E bit 1.
73
SSI1Fss
I/O
TTL
SSI module 1 frame signal
PE2
I/O
TTL
GPIO port E bit 2.
74
SSI1Rx
I
TTL
SSI module 1 receive
PE3
I/O
TTL
GPIO port E bit 3.
75
SSI1Tx
O
TTL
SSI module 1 transmit
76
CMOD1
I
TTL
CPU Mode bit 1. Input must be set to logic 0 (grounded); other
encodings reserved.
PC3
I/O
TTL
GPIO port C bit 3.
77
SWO
O
TTL
JTAG TDO and SWO.
TDO
O
TTL
JTAG TDO and SWO.
PC2
I/O
TTL
GPIO port C bit 2.
78
TDI
I
TTL
JTAG TDI.
PC1
I/O
TTL
GPIO port C bit 1.
79
SWDIO
I/O
TTL
JTAG TMS and SWDIO.
TMS
I/O
TTL
JTAG TMS and SWDIO.
PC0
I/O
TTL
GPIO port C bit 0.
80
SWCLK
I
TTL
JTAG/SWD CLK.
TCK
I
TTL
JTAG/SWD CLK.
81
VDD
-
Power Positive supply for I/O and some logic.
82
GND
-
Power Ground reference for logic and I/O pins.
PH3
I/O
TTL
GPIO port H bit 3.
83
Fault
I
TTL
PWM Fault.
84
PH2
I/O
TTL
GPIO port H bit 2.
July 24, 2012
615
Texas Instruments-Production Data