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LM3S1969 Datasheet, PDF (176/677 Pages) Texas Instruments – Stellaris® LM3S1969 Microcontroller | |||
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System Control
OBSOLETE: TI has discontinued production of this device.
â Source of clocks in sleep and deep-sleep modes
â System clock derived from PLL or other clock source
â Enabling/disabling of oscillators and PLL
â Clock divisors
â Crystal input selection
Figure 5-5 on page 177 shows the logic for the main clock tree. The peripheral blocks are driven by
the system clock signal and can be individually enabled/disabled. The ADC clock signal is
automatically divided down to 16 MHz for proper ADC operation. The PWM clock signal is a
synchronous divide of the system clock to provide the PWM circuit with more range (set with PWMDIV
in RCC).
Note: When the ADC module is in operation, the system clock must be at least 16 MHz.
176
July 24, 2012
Texas Instruments-Production Data
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