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LM3S1969 Datasheet, PDF (10/677 Pages) Texas Instruments – Stellaris® LM3S1969 Microcontroller
Table of Contents
OBSOLETE: TI has discontinued production of this device.
List of Figures
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Stellaris LM3S1969 Microcontroller High-Level Block Diagram ............................... 43
CPU Block Diagram ............................................................................................. 53
TPIU Block Diagram ............................................................................................ 54
Cortex-M3 Register Set ........................................................................................ 56
Bit-Band Mapping ................................................................................................ 76
Data Storage ....................................................................................................... 77
Vector Table ........................................................................................................ 83
Exception Stack Frame ........................................................................................ 85
SRD Use Example ............................................................................................... 99
JTAG Module Block Diagram .............................................................................. 158
Test Access Port State Machine ......................................................................... 161
IDCODE Register Format ................................................................................... 167
BYPASS Register Format ................................................................................... 167
Boundary Scan Register Format ......................................................................... 168
Basic RST Configuration .................................................................................... 171
External Circuitry to Extend Power-On Reset ....................................................... 172
Reset Circuit Controlled by Switch ...................................................................... 172
Power Architecture ............................................................................................ 174
Main Clock Tree ................................................................................................ 177
Hibernation Module Block Diagram ..................................................................... 237
Clock Source Using Crystal ................................................................................ 239
Clock Source Using Dedicated Oscillator ............................................................. 239
Flash Block Diagram .......................................................................................... 257
GPIO Port Block Diagram ................................................................................... 287
GPIODATA Write Example ................................................................................. 288
GPIODATA Read Example ................................................................................. 288
GPTM Module Block Diagram ............................................................................ 329
16-Bit Input Edge Count Mode Example .............................................................. 333
16-Bit Input Edge Time Mode Example ............................................................... 334
16-Bit PWM Mode Example ................................................................................ 335
WDT Module Block Diagram .............................................................................. 365
ADC Module Block Diagram ............................................................................... 389
Differential Sampling Range, VIN_ODD = 1.5 V ...................................................... 393
Differential Sampling Range, VIN_ODD = 0.75 V .................................................... 393
Differential Sampling Range, VIN_ODD = 2.25 V .................................................... 394
Internal Temperature Sensor Characteristic ......................................................... 395
UART Module Block Diagram ............................................................................. 426
UART Character Frame ..................................................................................... 427
IrDA Data Modulation ......................................................................................... 429
SSI Module Block Diagram ................................................................................. 467
TI Synchronous Serial Frame Format (Single Transfer) ........................................ 470
TI Synchronous Serial Frame Format (Continuous Transfer) ................................ 471
Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 .......................... 471
Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .................. 472
Freescale SPI Frame Format with SPO=0 and SPH=1 ......................................... 473
Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0 ............... 473
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July 24, 2012
Texas Instruments-Production Data