LP3971 Datasheet, PDF (6/57 Pages) National Semiconductor (TI) – POWER MANAGEMENT UNIT FOR ADVANCED APPLICATION PROCESSORS

LP3971
SNVS432U – JANUARY 2006 – REVISED OCTOBER 2008
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Pin Descriptions (continued)
Pin #
Name
I/O
Type
Description
36
SYS_EN
I
Input Digital enable pin for the high voltage power domain supplies. Output from
D
the Monahans processor.
37
PWR_EN
I
Digital enable pin for the Low Voltage domain supplies. Output signal from the
D
Monahans processor
38
PGND1
G
G
Buck1 NMOS Power Ground
39
SW1
O
PWR Buck1 Switcher output
40
VIN Buck1
I
PWR Battery input power to Buck1
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings ⁽¹⁾
All Inputs
GND to GND SLUG
Junction Temperature (T_J-MAX)
Storage Temperature
Power Dissipation
(T_A = 70°C) ⁽²⁾
Junction-to-Ambient Thermal
Resistance θ_JA(2)
Maximum Lead Temp (Soldering)
ESD Rating ⁽³⁾
Human Body Model
Machine Model
−0.3V to +6.5V
±0.3V
150°C
−65°C to +150°C
3.2W
25°C/W
260°C
2 kV
200V
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits
and associated test conditions, see the Electrical Characteristics tables.
(2) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-
OP = 125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance
of the part/package in the application (θ_JA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θ_JA x PD-MAX).
(3) The Human body model is a 100 pF capacitor discharged through a 1.5 k Ω resistor into each pin. (MIL-STD-883 3015.7) The machine
model is a 200 pF capacitor discharged directly into each pin. (EAIJ)
Operating Ratings
V_IN LDO 4,5
V_EN
Junction Temperature (T_J)
Operating Temperature (T_A)
Maximum Power Dissipation
(T_A = 70°C) ^{(1) (2)}
2.7V to 5.5V
1.74 to (V_IN
−40°C to +125°C
−40°C to +85°C
2.2W
(1) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-
OP = 125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance
of the part/package in the application (θ_JA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θ_JA x PD-MAX).
(2) Junction-to-ambient thermal resistance (θ_JA) is taken from a thermal modeling result, performed under the conditions and guidelines set
forth in the JEDEC standard JESD51–7. The test board is a 4-layer FR-4 board measuring 102 mm x 76 mm x 1.6 mm with a 2x1 array
of thermal vias. The ground plane on the board is 50 mm x 50 mm. Thickness of copper layers are 36 µm/1.8 µm/18 µm/36 µm (1.5 oz/1
oz/1 oz/1.5 oz). Ambient temperature in simulation is 22°C, still air. Power dissipation is 1W. Junction-to-ambient thermal resistance is
highly application and board-layout dependent. In applications where high maximum power dissipation exists, special care must be paid
to thermal dissipation issues in board design. The value of θ_JA of this product can vary significantly, depending on PCB material, layout,
and environmental conditions. In applications where high maximum power dissipation exists (high V_IN, high I_OUT), special care must be
paid to thermal dissipation issues. For more information on these topics, please refer to Application Note 1187: Leadless Leadframe
Package (LLP) and the Power Efficiency and Power Dissipation section of this datasheet.
6
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