LP3971 Datasheet, PDF (19/57 Pages) National Semiconductor (TI) – POWER MANAGEMENT UNIT FOR ADVANCED APPLICATION PROCESSORS

LP3971
www.ti.com
SNVS432U – JANUARY 2006 – REVISED OCTOBER 2008
The part will automatically transition into PFM mode when either of two conditions occurs for a duration of 32 or
more clock cycles:
A: The inductor current becomes discontinuous.
B: The peak PMOS switch current drops below the I_MODE level, (Typically I_MODE < 30 mA + V_IN/42Ω).
V_SW
2V/DIV
I_L
200 mA/DIV
V_OUT
VIN = 3.6V
VOUT = 1.5V
I_OUT = 20 mA
20 mV/DIV
AC Coupled
TIME (4 Ps/DIV)
Figure 4. Typical PFM Operation
During PFM operation, the converter positions the output voltage slightly higher than the nominal output voltage
during PWM operation, allowing additional headroom for voltage drop during a load transient from light to heavy
load. The PFM comparators sense the output voltage via the feedback pin and control the switching of the output
FETs such that the output voltage ramps between <0.6% and <1.7% above the nominal PWM output voltage. If
the output voltage is below the “high” PFM comparator threshold, the PMOS power switch is turned on. It
remains on until the output voltage reaches the ‘high’ PFM threshold or the peak current exceeds the IPFM level
set for PFM mode. The typical peak current in PFM mode is: IPFM = 112 mA + V_IN/27Ω. Once the PMOS power
switch is turned off, the NMOS power switch is turned on until the inductor current ramps to zero. When the
NMOS zero-current condition is detected, the NMOS power switch is turned off. If the output voltage is below the
‘high’ PFM comparator threshold (see Figure 5), the PMOS switch is again turned on and the cycle is repeated
until the output reaches the desired level. Once the output reaches the ‘high’ PFM threshold, the NMOS switch is
turned on briefly to ramp the inductor current to zero and then both output switches are turned off and the part
enters an extremely low power mode. Quiescent supply current during this ‘sleep’ mode is 21 μA (typ), which
allows the part to achieve high efficiencies under extremely light load conditions. When the output drops below
the ‘low’ PFM threshold, the cycle repeats to restore the output voltage (average voltage in PFM mode) to
<1.15% above the nominal PWM output voltage. If the load current should increase during PFM mode (see
Figure 5) causing the output voltage to fall below the ‘low2’ PFM threshold, the part will automatically transition
into fixed-frequency PWM mode. Typically when V_IN = 3.6V the part transitions from PWM to PFM mode at 100
mA output current .
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