LP3971 Datasheet, PDF (18/57 Pages) National Semiconductor (TI) – POWER MANAGEMENT UNIT FOR ADVANCED APPLICATION PROCESSORS

LP3971
SNVS432U – JANUARY 2006 – REVISED OCTOBER 2008
www.ti.com
During the second portion of each cycle, the controller turns the PFET switch off, blocking current flow from the
input, and then turns the NFET synchronous rectifier on. The inductor draws current from ground through the
NFET to the output filter capacitor and load, which ramps the inductor current down with a slope of –V_OUT/L.
The output filter stores charge when the inductor current is high, and releases it when inductor current is low,
smoothing the voltage across the load.
The output voltage is regulated by modulating the PFET switch on time to control the average current sent to the
load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and
synchronous rectifier at the SW pin to a low-pass filter formed by the inductor and output filter capacitor. The
output voltage is equal to the average voltage at the SW pin.
PWM OPERATION
During PWM operation the converter operates as a voltage mode controller with input voltage feed forward. This
allows the converter to achieve good load and line regulation. The DC gain of the power stage is proportional to
the input voltage. To eliminate this dependence, feed forward inversely proportional to the input voltage is
introduced.
While in PWM (Pulse Width Modulation) mode, the output voltage is regulated by switching at a constant
frequency and then modulating the energy per cycle to control power to the load. At the beginning of each clock
cycle the PFET switch is turned on and the inductor current ramps up until the comparator trips and the control
logic turns off the switch. The current limit comparator can also turn off the switch in case the current limit of the
PFET is exceeded. Then the NFET switch is turned on and the inductor current ramps down. The next cycle is
initiated by the clock turning off the NFET and turning on the PFET.
V_SW
2V/DIV
I_L
200 mA/DIV
V_OUT
V_IN = 3.6V
V_OUT = 1.5V
I_OUT = 400 mA
10 mV/DIV
AC Coupled
TIME (200 ns/DIV)
Figure 3. Typical PWM Operation
Internal Synchronous Rectification
While in PWM mode, the converters uses an internal NFET as a synchronous rectifier to reduce rectifier forward
voltage drop and associated power loss. Synchronous rectification provides a significant improvement in
efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier
diode.
Current Limiting
A current limit feature allows the converters to protect itself and external components during overload conditions.
PWM mode implements current limiting using an internal comparator that trips at 2.0 A (typ). If the output is
shorted to ground the device enters a timed current limit mode where the NFET is turned on for a longer duration
until the inductor current falls below a low threshold, ensuring inductor current has more time to decay, thereby
preventing runaway.
PFM OPERATION
At very light loads, the converter enters PFM mode and operates with reduced switching frequency and supply
current to maintain high efficiency.
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