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CC430F6137_14 Datasheet, PDF (50/120 Pages) Texas Instruments – MSP430™ SoC With RF Core
ECCN 5E002 TSPA - Technology / Software Publicly Available
CC430F6137, CC430F6135, CC430F6127, CC430F6126, CC430F6125
CC430F5137, CC430F5135, CC430F5133
SLAS554H – MAY 2009 – REVISED SEPTEMBER 2013
www.ti.com
Crystal Oscillator, XT1, Low-Frequency Mode(1)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
ΔIDVCC.LF
fXT1,LF0
PARAMETER
Differential XT1 oscillator crystal
current consumption from lowest
drive setting, LF mode
XT1 oscillator crystal frequency,
LF mode
TEST CONDITIONS
fOSC = 32768 Hz, XTS = 0,
XT1BYPASS = 0, XT1DRIVEx = 1,
TA = 25°C
fOSC = 32768 Hz, XTS = 0,
XT1BYPASS = 0, XT1DRIVEx = 2,
TA = 25°C
fOSC = 32768 Hz, XTS = 0,
XT1BYPASS = 0, XT1DRIVEx = 3,
TA = 25°C
XTS = 0, XT1BYPASS = 0
VCC
3.0 V
MIN TYP MAX UNIT
0.075
0.170
µA
0.290
32768
Hz
fXT1,LF,SW
XT1 oscillator logic-level square-
wave input frequency, LF mode
XTS = 0, XT1BYPASS = 1(2) (3)
10 32.768
50 kHz
OALF
Oscillation allowance for
LF crystals(4)
XTS = 0,
XT1BYPASS = 0, XT1DRIVEx = 0,
fXT1,LF = 32768 Hz, CL,eff = 6 pF
XTS = 0,
XT1BYPASS = 0, XT1DRIVEx = 1,
fXT1,LF = 32768 Hz, CL,eff = 12 pF
XTS = 0, XCAPx = 0(6)
210
kΩ
300
2
CL,eff
Integrated effective load
capacitance, LF mode(5)
XTS = 0, XCAPx = 1
XTS = 0, XCAPx = 2
5.5
pF
8.5
XTS = 0, XCAPx = 3
12.0
fFault,LF
Duty cycle, LF mode
Oscillator fault frequency,
LF mode(7)
XTS = 0, Measured at ACLK,
fXT1,LF = 32768 Hz
XTS = 0(8)
30
70 %
10
10000 Hz
tSTART,LF Startup time, LF mode
fOSC = 32768 Hz, XTS = 0,
XT1BYPASS = 0, XT1DRIVEx = 0,
TA = 25°C, CL,eff = 6 pF
fOSC = 32768 Hz, XTS = 0,
XT1BYPASS = 0, XT1DRIVEx = 3,
TA = 25°C, CL,eff = 12 pF
3.0 V
1000
ms
500
(1) To improve EMI on the XT1 oscillator, the following guidelines should be observed.
(a) Keep the trace between the device and the crystal as short as possible.
(b) Design a good ground plane around the oscillator pins.
(c) Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT.
(d) Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins.
(e) Use assembly materials and techniques that avoid any parasitic load on the oscillator XIN and XOUT pins.
(f) If conformal coating is used, make sure that it does not induce capacitive or resistive leakage between the oscillator pins.
(2) When XT1BYPASS is set, XT1 circuits are automatically powered down. Input signal is a digital square wave with parametrics defined in
the Schmitt-trigger Inputs section of this datasheet.
(3) Maximum frequency of operation of the entire device cannot be exceeded.
(4) Oscillation allowance is based on a safety factor of 5 for recommended crystals. The oscillation allowance is a function of the
XT1DRIVEx settings and the effective load. In general, comparable oscillator allowance can be achieved based on the following
guidelines, but should be evaluated based on the actual crystal selected for the application:
(a) For XT1DRIVEx = 0, CL,eff ≤ 6 pF
(b) For XT1DRIVEx = 1, 6 pF ≤ CL,eff ≤ 9 pF
(c) For XT1DRIVEx = 2, 6 pF ≤ CL,eff ≤ 10 pF
(d) For XT1DRIVEx = 3, CL,eff ≥ 6 pF
(5) Includes parasitic bond and package capacitance (approximately 2 pF per pin).
Because the PCB adds additional capacitance, it is recommended to verify the correct load by measuring the ACLK frequency. For a
correct setup, the effective load capacitance should always match the specification of the used crystal.
(6) Requires external capacitors at both terminals. Values are specified by crystal manufacturers.
(7) Frequencies below the MIN specification set the fault flag. Frequencies above the MAX specification do not set the fault flag.
Frequencies between the MIN and MAX specifications might set the flag
(8) Measured with logic-level input frequency but also applies to operation with crystals.
50
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