CC430F6137_14 Datasheet, PDF (3/120 Pages) Texas Instruments – MSP430™ SoC With RF Core

ECCN 5E002 TSPA - Technology / Software Publicly Available
www.ti.com
CC430F6137, CC430F6135, CC430F6127, CC430F6126, CC430F6125
CC430F5137, CC430F5135, CC430F5133
SLAS554H – MAY 2009 – REVISED SEPTEMBER 2013
Table 1. Family Members⁽¹⁾⁽²⁾
Device
USCI
Program
(KB)
SRAM (KB) Timer_A⁽³⁾
LCD_B^{(4) Channel A: Channel B:} ADC12_A⁽⁴⁾ Comp_B
UART, LIN, SPI, I²C
I/O
Package
Type
IrDA, SPI
CC430F6137
32
4
5, 3
96 seg
1
1
8 ext,
4 int ch.
8 ch.
44
64 RGC
CC430F6135
16
2
5, 3
96 seg
1
1
8 ext,
4 int ch.
8 ch.
44
64 RGC
CC430F6127
32
4
5, 3
96 seg
1
1
n/a
8 ch.
44
64 RGC
CC430F6126
32
2
5, 3
96 seg
1
1
n/a
8 ch.
44
64 RGC
CC430F6125
16
2
5, 3
96 seg
1
1
n/a
8 ch.
44
64 RGC
CC430F5137
32
4
5, 3
n/a
1
1
6 ext,
4 int ch.
6 ch.
30
48 RGZ
CC430F5135
16
2
5, 3
n/a
1
1
6 ext,
4 int ch.
6 ch.
30
48 RGZ
CC430F5133
8
2
5, 3
n/a
1
1
6 ext,
4 int ch.
6 ch.
30
48 RGZ
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) Each number in the sequence represents an instantiation of Timer_A with its associated number of capture compare registers and PWM
output generators available. For example, a number sequence of 5, 3 would represent two instantiations of Timer_A, the first
instantiation having 5 and the second instantiation having 3 capture compare registers and PWM output generators, respectively.
(4) n/a = not available
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