CC430F6137_14 Datasheet, PDF (43/120 Pages) Texas Instruments – MSP430™ SoC With RF Core

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ECCN 5E002 TSPA - Technology / Software Publicly Available
CC430F6137, CC430F6135, CC430F6127, CC430F6126, CC430F6125
CC430F5137, CC430F5135, CC430F5133
SLAS554H – MAY 2009 – REVISED SEPTEMBER 2013
Low-Power Mode Supply Currents (Into V_CC) Excluding External Current
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)^{(1) (2)}
PARAMETER
Temperature (T_A)
V_CC
PMMCOREVx
-40°C
25°C
60°C
85°C
UNIT
TYP MAX TYP MAX TYP MAX TYP MAX
2.2 V
0
I_LPM0,1MHz Low-power mode 0^{(3) (4)}
3.0 V
3
80
100
90
110
80
100
90
110
80
100
90
110
80
100
µA
90
110
2.2 V
0
I_LPM2
Low-power mode 2^{(5) (4)}
3.0 V
3
6.5
11
6.5
11
6.5
11
6.5
11
µA
7.5
12
7.5
12
7.5
12
7.5
12
0
1.8
2.0
2.6
3.0
4.0
4.4
5.9
I_LPM3,XT1LF
Low-power mode 3, crystal
mode ^{(6) (4)}
3.0 V
1
2
1.9
2.0
2.1
2.2
3.2
3.4
4.8
µA
5.1
3
2.0
2.2
2.9
3.5
4.8
5.3
7.4
0
0.9
1.1
2.3
2.1
3.7
3.5
5.6
I_LPM3,VLO
Low-power mode 3,
VLO mode^{(7) (4)}
1
3.0 V
2
1.0
1.1
1.2
1.3
2.3
2.5
3.9
µA
4.2
3
1.1
1.3
2.6
2.6
4.5
4.4
7.1
0
0.8
1.0
2.2
2.0
3.6
3.4
5.5
1
0.9
1.1
2.2
3.8
I_LPM4
Low-power mode 4^{(8) (4)}
3.0 V
2
1.0
1.2
2.4
µA
4.1
3
1.0
1.2
2.5
2.5
4.4
4.3
7.0
(1) All inputs are tied to 0 V or to V_CC. Outputs do not source or sink any current.
(2) The currents are characterized with a Micro Crystal MS1V-T1K crystal with a load capacitance of 12.5 pF. The internal and external load
capacitance are chosen to closely match the required 12.5 pF.
(3) Current for watchdog timer clocked by SMCLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 0, SCG1 = 0, OSCOFF = 0 (LPM0); f_ACLK = 32768 Hz, f_MCLK = 0 MHz, f_SMCLK = f_DCO = 1 MHz
(4) Current for brownout, high side supervisor (SVS_H) normal mode included. Low side supervisor and monitors disabled (SVS_L, SVM_L).
High side monitor disabled (SVM_H). RAM retention enabled.
(5) Current for watchdog timer and RTC clocked by ACLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 0, SCG1 = 1, OSCOFF = 0 (LPM2); f_ACLK = 32768 Hz, f_MCLK = 0 MHz, f_SMCLK = f_DCO = 0 MHz; DCO setting = 1
MHz operation, DCO bias generator enabled.
(6) Current for watchdog timer and RTC clocked by ACLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 0 (LPM3); f_ACLK = 32768 Hz, f_MCLK = f_SMCLK = f_DCO = 0 MHz
(7) Current for watchdog timer and RTC clocked by ACLK included. ACLK = VLO.
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 0 (LPM3); f_ACLK = f_VLO, f_MCLK = f_SMCLK = f_DCO = 0 MHz
(8) CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 1 (LPM4); f_DCO = f_ACLK = f_MCLK = f_SMCLK = 0 MHz
Copyright © 2009–2013, Texas Instruments Incorporated
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CC430F5135 CC430F5133