CC430F6137_14 Datasheet, PDF (1/120 Pages) Texas Instruments – MSP430™ SoC With RF Core

ECCN 5E002 TSPA - Technology / Software Publicly Available
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CC430F6137, CC430F6135, CC430F6127, CC430F6126, CC430F6125
CC430F5137, CC430F5135, CC430F5133
SLAS554H – MAY 2009 – REVISED SEPTEMBER 2013
MSP430™ SoC With RF Core
Check for Samples: CC430F6137, CC430F6135, CC430F6127, CC430F6126, CC430F6125, CC430F5137, CC430F5135, CC430F5133
FEATURES
1
•23 True System-on-Chip (SoC) for Low-Power
Wireless Communication Applications
• Wide Supply Voltage Range:
3.6 V Down to 1.8 V
• Ultralow-Power Consumption:
– CPU Active Mode (AM): 160 µA/MHz
– Standby Mode (LPM3 RTC Mode): 2.0 µA
– Off Mode (LPM4 RAM Retention): 1.0 µA
– Radio in RX: 15 mA, 250 kbps, 915 MHz
• MSP430 System and Peripherals
– 16-Bit RISC Architecture, Extended
Memory, up to 20-MHz System Clock
– Wake Up From Standby Mode in Less
Than 6 µs
– Flexible Power-Management System With
SVS and Brownout
– Unified Clock System With FLL
– 16-Bit Timer TA0, Timer_A With Five
Capture/Compare Registers
– 16-Bit Timer TA1, Timer_A With Three
Capture/Compare Registers
– Hardware Real-Time Clock (RTC)
– Two Universal Serial Communication
Interfaces
– USCI_A0 Supports UART, IrDA, SPI
– USCI_B0 Supports I²C, SPI
– 12-Bit Analog-to-Digital Converter (ADC)
With Internal Reference, Sample-and-Hold,
and Autoscan Features (CC430F613x and
CC430F513x Only)
– Comparator
– Integrated LCD Driver With Contrast
Control for up to 96 Segments
(CC430F61xx Only)
– 128-Bit AES Security Encryption and
Decryption Coprocessor
– 32-Bit Hardware Multiplier
– Three-Channel Internal DMA
– Serial Onboard Programming, No External
Programming Voltage Needed
– Embedded Emulation Module (EEM)
• High-Performance Sub-1-GHz RF Transceiver
Core
– Same as in CC1101
– Wide Supply Voltage Range: 2.0 V to 3.6 V
– Frequency Bands: 300 MHz to 348 MHz,
389 MHz to 464 MHz, and 779 MHz to
928 MHz
– Programmable Data Rate From 0.6 kBaud
to 500 kBaud
– High Sensitivity (–117 dBm at 0.6 kBaud,
–111 dBm at 1.2 kBaud, 315 MHz,
1% Packet Error Rate)
– Excellent Receiver Selectivity and Blocking
Performance
– Programmable Output Power Up to
+12 dBm for All Supported Frequencies
– 2-FSK, 2-GFSK, and MSK Supported as
Well as OOK and Flexible ASK Shaping
– Flexible Support for Packet-Oriented
Systems: On-Chip Support for Sync Word
Detection, Address Check, Flexible Packet
Length, and Automatic CRC Handling
– Support for Automatic Clear Channel
Assessment (CCA) Before Transmitting (for
Listen-Before-Talk Systems)
– Digital RSSI Output
– Suited for Systems Targeting Compliance
With EN 300 220 (Europe) and
FCC CFR Part 15 (US)
– Suited for Systems Targeting Compliance
With Wireless M-Bus Standard EN
13757‑4:2005
– Support for Asynchronous and
Synchronous Serial Receive or Transmit
Mode for Backward Compatibility With
Existing Radio Communication Protocols
• Table 1 Summarizes Family Members
• For Complete Module Descriptions, See the
CC430 Family User's Guide (SLAU259)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
MSP430 is a trademark of Texas Instruments.
2
All other trademarks are the property of their respective owners.
3
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2013, Texas Instruments Incorporated