AM1705_16 Datasheet, PDF (50/165 Pages) Texas Instruments – AM1705 ARM® Microprocessor

AM1705
SPRS657E – FEBRUARY 2010 – REVISED JUNE 2014
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System Interrupt
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28 - 31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Table 6-6. AINTC System Interrupt Assignments
Interrupt Name
COMMTX
COMMRX
NINT
PRU_EVTOUT0
PRU_EVTOUT1
PRU_EVTOUT2
PRU_EVTOUT3
PRU_EVTOUT4
PRU_EVTOUT5
PRU_EVTOUT6
PRU_EVTOUT7
EDMA3_CC0_CCINT
EDMA3_CC0_CCERRINT
EDMA3_TC0_TCERRINT
EMIFA_INT
IIC0_INT
MMCSD_INT0
MMCSD_INT1
PSC0_ALLINT
-
SPI0_INT
T64P0_TINT12
T64P0_TINT34
T64P1_TINT12
T64P1_TINT34
UART0_INT
-
MPU_BOOTCFG_ERR
-
EDMA3_TC1_TCERRINT
EMAC_C0RXTHRESH
EMAC_C0RX
EMAC_C0TX
EMAC_C0MISC
EMAC_C1RXTHRESH
EMAC_C1RX
EMAC_C1TX
EMAC_C1MISC
EMIF_MEMERR
GPIO_B0INT
GPIO_B1INT
GPIO_B2INT
GPIO_B3INT
GPIO_B4INT
GPIO_B5INT
GPIO_B6INT
Source
ARM
ARM
ARM
PRUSS Interrupt
PRUSS Interrupt
PRUSS Interrupt
PRUSS Interrupt
PRUSS Interrupt
PRUSS Interrupt
PRUSS Interrupt
PRUSS Interrupt
EDMA CC Region 0
EDMA Channel Controller
EDMA Transfer Controller 0
EMIFA
I2C0
MMCSD
MMCSD
PSC0
Reserved
SPI0
Timer64P0 Interrupt 12
Timer64P0 Interrupt 34
Timer64P1 Interrupt 12
Timer64P1 Interrupt 34
UART0
Reserved
Shared MPU and SYSCFG Address/Protection Error
Interrupt
Reserved
EDMA Transfer Controller 1
EMAC - Core 0 Receive Threshold Interrupt
EMAC - Core 0 Receive Interrupt
EMAC - Core 0 Transmit Interrupt
EMAC - Core 0 Miscellaneous Interrupt
EMAC - Core 1 Receive Threshold Interrupt
EMAC - Core 1 Receive Interrupt
EMAC - Core 1 Transmit Interrupt
EMAC - Core 1 Miscellaneous Interrupt
EMIFB
GPIO Bank 0 Interrupt
GPIO Bank 1 Interrupt
GPIO Bank 2 Interrupt
GPIO Bank 3 Interrupt
GPIO Bank 4 Interrupt
GPIO Bank 5 Interrupt
GPIO Bank 6 Interrupt
50
Peripheral Information and Electrical Specifications
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