AM1705_16 Datasheet, PDF (31/165 Pages) Texas Instruments – AM1705 ARM® Microprocessor

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AM1705
SPRS657E – FEBRUARY 2010 – REVISED JUNE 2014
4.2 SYSCFG Module
The following system level features of the chip are controlled by the SYSCFG peripheral:
• Readable Device, Die, and Chip Revision ID
• Control of Pin Multiplexing
• Priority of bus accesses different bus masters in the system
• Capture at power on reset the chip BOOT[15:0] pin values and make them available to software
• Special case settings for peripherals:
– Locking of PLL controller settings
– Default burst sizes for EDMA3 TC0 and TC1
– Selection of the source for the eCAP module input capture (including on chip sources)
– McASP AMUTEIN selection and clearing of AMUTE status for the three McASP peripherals
– Control of the reference clock source and other side-band signals for both of the integrated USB
PHYs
– Clock source selection for EMIFA and EMIFB
• Selects the source of emulation suspend signal of peripherals supporting this function.
Many registers are accessible only by a host (ARM) when it is operating in its privileged mode. (ex. from
the kernel, but not from user space code).
BYTE ADDRESS
0x01C1 4000
0x01C14008
0x01C1 400C
0x01C1 4010
0x01C1 4014
0x01C1 4018
0x01C1 4020
0x01C1 4024
0x01C1 4038
0x01C1 403C
0x01C1 4040
0x01C1 4044
0x01C1 40E0
0x01C1 40E4
0x01C1 40E8
0x01C1 40EC
0x01C1 40F0
0x01C1 40F4
0x01C1 40F8
0x01C1 4110
0x01C1 4114
0x01C1 4118
0x01C1 4120
0x01C1 4124
0x01C1 4128
0x01C1 412C
0x01C1 4130
0x01C1 4134
Table 4-1. System Configuration (SYSCFG) Module Register Access
ACRONYM
REVID
DIEIDR0
DIEIDR1
DIEIDR2
DIEIDR3
DEVIDR0
BOOTCFG
CHIPREVID
KICK0R
KICK1R
HOST0CFG
HOST1CFG
IRAWSTAT
IENSTAT
IENSET
IENCLR
EOI
FLTADDRR
FLTSTAT
MSTPRI0
MSTPRI1
MSTPRI2
PINMUX0
PINMUX1
PINMUX2
PINMUX3
PINMUX4
PINMUX5
REGISTER DESCRIPTION
Revision Identification Register
Device Identification Register 0
Device Identification Register 1
Device Identification Register 2
Device Identification Register 3
JTAG Identification Register
Boot Configuration Register
Silicon Revision Identification Register
Kick 0 Register
Kick 1 Register
Host 0 Configuration Register
Host 1 Configuration Register
Interrupt Raw Status/Set Register
Interrupt Enable Status/Clear Register
Interrupt Enable Register
Interrupt Enable Clear Register
End of Interrupt Register
Fault Address Register
Fault Status Register
Master Priority 0 Register
Master Priority 1 Register
Master Priority 2 Register
Pin Multiplexing Control 0 Register
Pin Multiplexing Control 1 Register
Pin Multiplexing Control 2 Register
Pin Multiplexing Control 3 Register
Pin Multiplexing Control 4 Register
Pin Multiplexing Control 5 Register
ACCESS
—
—
—
—
—
—
Privileged mode
Privileged mode
Privileged mode
Privileged mode
—
—
Privileged mode
Privileged mode
Privileged mode
Privileged mode
Privileged mode
Privileged mode
—
Privileged mode
Privileged mode
Privileged mode
Privileged mode
Privileged mode
Privileged mode
Privileged mode
Privileged mode
Privileged mode
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