TLC320AD50C-I_15 Datasheet, PDF (48/57 Pages) Texas Instruments – SIGMA-DELTA ANALOG INTERFACE CIRCUITS WITH MASTER-SLAVE FUNCTION

7 Application Information
TMS320C2x/3x/5x/2xx/54x
XF
CLKOUT
DX
DR
FSX
FSR
CLKX
CLKR
TLC320AD50C
FC
MCLK
DIN
DOUT
FS
FSD
SCLK
DVDD
M/S
TLC320AD50C
FC
MCLK
DIN
DOUT
FS
FSD
SCLK
M/S
Master Mode
Slave Mode
Figure 7–1. Master Device and Slave Device Connections (to DSP Interface)
When multiple AD50’s or AD52’s are attached to a single DSP serial interface in a master/slave configuration, the
control registers should be programmed in the following order during device initialization:
Control register 1
Control register 2
Control register 4
Control register 3
All AD50 or AD52 devices will be configured the same with a single global initialization being written to registers 1,
2, and 4. Once register 3 is programmed (setting the number of SCLKS between FS and FSD), each device will begin
communicating in its designated time slot.
7–1