TLC320AD50C-I_15 Datasheet, PDF (41/57 Pages) Texas Instruments – SIGMA-DELTA ANALOG INTERFACE CIRCUITS WITH MASTER-SLAVE FUNCTION

twH
MCLK
SCLK
FS
DOUT
td1
ten1
D15
twL
td2
D14
tdis1
tsu1
DIN
D15
D14
th1
NOTE A: The master mode and D0 through D5 of control 3 register are greater than 17.
Figure 5–4. Serial Communication Timing (Master Mode)
MCLK
SCLK
FS
DOUT
DIN
twH
twL
td4
td5
ten2
D15
D14
tdis2
tsu2
D15
D14
th2
Figure 5–5. Serial Communication Timing (Slave Mode)
5–2