TLC320AD50C-I_15 Datasheet, PDF (14/57 Pages) Texas Instruments – SIGMA-DELTA ANALOG INTERFACE CIRCUITS WITH MASTER-SLAVE FUNCTION

1.7 Register Functional Summary
There are seven control registers that are used as follows:
Register 0 The No-Op register. Addressing register 0 allows secondary communications requests without altering
any other register.
Register 1 Control register 1. The data in this register controls:
• Software reset
• Software power down
• Normal or auxiliary analog inputs enabling
• Normal or auxiliary analog inputs monitoring
• Selection of monitor amplifier output gain
• Selection of digital loopback
• Selection of16-bit or (15+1)-bit mode of DAC operation
Register 2 Control register 2. The data in this register:
• Contains the output value of FLAG
• Selects phone mode
• Contains the output flag indicating a decimator FIR filter overflow
• Selects either 16-bit mode or (15+1)-bit mode of ADC operation
• Enables analog loopback
Register 3 Control register 3. The data in this register:
• Sets the number of SCLK delays between FS and FSD
• Informs the master device of how many slaves are connected in the chain
Register 4 Control register 4. The data in this register:
• Selects the amplifier gain for the input and output amplifiers
 • Sets the sample rate by choosing the value of N from 1 to 8 where f_s = MCLK/(128 N) or
 MCLK/(512 N)
 • Selects the PLL. If the PLL is selected, the sampling rate is set to MCLK/(128 N). If the PLL is
 bypassed, the sampling rate can be set to MCLK/(512 N).
Register 5 Reserved for factory test. Do not write to this register.
Register 6 Reserved for factory test. Do not write to this register.
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