THS4552 Datasheet, PDF (46/71 Pages) Texas Instruments – Dual-Channel, Low-Noise, Precision, 150-MHz, Fully Differential Amplifier

THS4552
SBOS831 – DECEMBER 2016
www.ti.com
A 5-dB peaked response (see Figure 85) results from the configuration of Figure 83, which results from a
nominal 32° phase margin. This peaking can be eliminated by placing two feedback capacitors across the R_F
elements and a differential input capacitor. Adding these capacitors provides a transition from a resistively set
noise gain (NG1 = 1.1 in Figure 83) to a capacitive divider at high frequency, and flattening out to a higher noise
gain (NG2). The key for this approach is to target a Z_O where the noise gain begins to peak up. Using only the
following terms, and targeting a closed-loop flat (Butterworth) response, gives this solution sequence (from
Equation 11 to Equation 13) for Z_O and then the capacitor values. See the OPA847 data sheet (page 12) for a
discussion of this inverting noise gain shaping technique.
• Gain bandwidth product in Hz (135 MHz for the THS4552)
• Low-frequency noise gain, NG1 (equal to 1.1 in the attenuator gain of a 0.1-V/V design)
• The target high-frequency noise gain is selected to be higher than NG1 (NG2 = 5 V/V) in this example
• Feedback resistor value, R_F (is assumed balanced for this differential design = 1 kΩ)
From these elements, for any voltage feedback op amp or FDA, solve for Z_O as shown in Equation 11:
Z_O
GBP
NG1²
§
¨¨©¹
NG1
NG2
1
2
NG1
NG2
·
¸¸¹
(11)
From this target zero frequency in the noise gain, the feedback capacitors can be solved as Equation 12:
C_F
1
2S ‡ R_F ‡ Z_O ‡ NG2
(12)
The next step is to resolve the input capacitance on the summing junction. Equation 13 is for a single-ended op
amp where the capacitor goes to ground. To use the capacitance (C_S) resulting from Equation 13 for a voltage-
feedback FDA, cut the target value in half and place the resulting C_S across the two inputs (reducing the external
value by the specified internal differential capacitance).
C_S NG2 1 C_F
(13)
Using the computed capacitor values allows for an estimate of the resulting flat response bandwidth f_–3dB
frequency, as shown in Equation 14:
f _3dB | GBP ‡ Z_O
(14)
Running through these steps for the THS4552 in the attenuator circuit of Figure 83 provides the proposed
compensation of Figure 84, where Equation 14 estimates a bandwidth of 22 MHz (the Z_O target is 3.5 MHz). The
solutions for C_F gives 9 pF, where this value is reduced to 8.4 pF to account for the internal 0.6-pF feedback.
The single-ended solution for C_S gives 36 pF, which is reduced to 18 pF to be differential, and is then further
reduced to 16.8 pF to account for the internal 1.2-pF differential input capacitance of the THS4552.
Gain of 0.1 V/V,
DC-Coupled,
Single-Ended Source to
Differential Output
CF1
8.4 pF
RF1
1k
THS4552 Wideband,
Fully Differential Amplifier
VS+
VS-
+
2.5 V
-2.5 V ⁺
Vin
±
±
RG1
10 k
CS
16.8 pF
VOCM
VS+
±
+
FDA
±
+
PD
VS- ^VS+
VOUT
RL
1k
RG2
10 k
RF2
1k
CF2
8.4 pF
Copyright © 2016, Texas Instruments Incorporated
Figure 84. Compensated Attenuator Circuit Using the THS4552
46
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