THS4552 Datasheet, PDF (30/71 Pages) Texas Instruments – Dual-Channel, Low-Noise, Precision, 150-MHz, Fully Differential Amplifier

THS4552
SBOS831 – DECEMBER 2016
www.ti.com
Feature Description (continued)
Using these expressions to generate a swept gain table of values results in Table 1, where the best standard 1%
resistor values are shown to minimize input impedance and gain error to target.
GAIN (V/V)
0.1
1
2
5
10
Table 1. Swept Gain 50-Ω Input Match with R_F = 1-kΩ (±1 Standard Values)
R_F (Ω)
1000
R_G1 (Ω)
10000
R_T (Ω)
49.9
R_G2 (Ω)
10000
Z_IN (Ω)
49.66
1000
976
51.1
1000
49.2
1020
499
52.3
523
48.9
1000
187
59
215
50.2
1020
88.7
69.8
118
50.6
A_V (V/V)
0.09965
1.0096
1.988
5.057
10.09
Where an input impedance match is not required, simply set the input resistor to obtain the desired gain without
an additional resistor to ground (remove R_T in Figure 69). This scenario is common when coming from the output
of another single-ended op amp (such as the OPA192). This single-ended to differential stage shows a higher
input impedance than the physical R_G as given by the expression for Z_A (active input impedance) shown as
Equation 4.
§
¨¹
R_G1
·
¸
§
¨¹
R_F
·
¸
Z_A R_G1 ^©
R_{G2 ¹ ©} R_{G1 ¹}
2 ^RF
R_G2
(4)
Using Equation 4 for the gain of 1 V/V with all resistors equal to 1-kΩ shows an input impedance of 1.33 kΩ. The
increased input impedance comes from the common-mode input voltage at the amplifier pins moving in the same
direction as the input signal. The common-mode input voltage must move to create the current in the non-signal
input R_G resistor to produce the inverted output. The current flow into the signal-side input resistor is impeded
because the common-mode input voltage moves with the input signal, thus increasing the apparent input
impedance in the signal input path.
9.3.3 I/O Headroom Considerations
The starting point for most designs is to assign an output common-mode voltage for the THS4552. For ac-
coupled signal paths, this voltage is often the default midsupply voltage to retain the most available output swing
around the voltage centered at the V_OCM voltage. For dc-coupled designs, set this voltage with consideration to
the required minimum headroom to the supplies as described in the specifications of the Electrical
Characteristics table for the V_OCM control. For precision ADC drivers, this output V_OCM becomes the input V_CM to
the ADC. Often, V_CM is set to V_REF / 2 to center the differential input on the available input when precision ADCs
are being driven.
From the target output V_OCM, the next step is to verify that the desired output differential peak-to-peak voltage
(V_OPP) stays within the supplies. For any desired differential V_OPP, make sure that the absolute maximum voltage
at the output pins swings with Equation 5 and Equation 6 and confirm that these expressions are within the
supply rails minus the output headroom required for the RRO device.
V_Omax
V_OCM
V_OPP
4
(5)
V_Omin
V_OCM
V_OPP
4
(6)
For instance, when the THS4552 drives the ADC3223 with a 0.95-V_CM control using a single 3.0-V supply, the
negative-going signal sets the maximum output swing from 0.95 V_CM to 0.2 V above ground. This 0.75-V, single-
sided swing becomes an available 4 × 0.75 V = 3-V_PP differential around the nominal 0.95-V_CM output common-
mode voltage. On the high side, the maximum output is equal to 1.7 V (0.95 V + 0.75 V), which is well within the
allowed maximum range of 2.8 V (3.0 V – 0.2 V). This available 3-V_PP maximum differential output is also well
beyond the maximum value required for the 2-V_PP input ADS3223.
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