TCA8418E_15 Datasheet, PDF (43/50 Pages) Texas Instruments – I2C Controlled Keypad Scan IC With Integrated ESD Protection

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11 Layout
TCA8418E
SCPS222C – MAY 2010 – REVISED OCTOBER 2015
11.1 Layout Guidelines
For printed circuit board (PCB) layout of the TCA8418E, common PCB layout practices should be followed, but
additional concerns related to high-speed data transfer, such as matched impedances and differential pairs are
not a concern for I²C signal speeds.
In all PCB layouts, it is best practice to avoid right angles in signal traces, to fan out signal traces away from
each other upon leaving the vicinity of an integrated circuit (IC), and to use thicker trace widths to carry higher
amounts of current that commonly pass through power and ground traces. Bypass and de-coupling capacitors
are commonly used to control the voltage on the VCC pin, using a larger capacitor to provide additional power in
the event of a short power supply glitch and a smaller capacitor to filter out high-frequency ripple. These
capacitors should be placed as close to the TCA8418E as possible.
For the layout example provided in Layout Example, a 4 layer board is required to route all of the signals. The
layout example shows a way to route the signals out from the device, which can eventually be brought up to the
top layer (or any required layer) with the use of a via. This technique is not demonstrated in this example due to
the complexity of the layout.
11.2 Layout Example
Traces
Top Layer
2^nd Layer
Bottom Layer
Figure 40. YFP Package Layout Example
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