TCA8418E_15 Datasheet, PDF (31/50 Pages) Texas Instruments – I2C Controlled Keypad Scan IC With Integrated ESD Protection

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TCA8418E
SCPS222C – MAY 2010 – REVISED OCTOBER 2015
KEC[3:0] indicates how many key events are in the FIFO. For example, KEC[3:0] = 0b0000 = 0 events, KEC[3:0]
= 0b0001 = 1 event and KEC[3:0] = 0b1010 = 10 events. As events happen (press or release), the count
increases accordingly.
8.6.2.4 Key Event Registers (FIFO), KEY_EVENT_A–J (Address 0x04–0x0D)
Table 13. Key Event Register Field Descriptions
ADDRESS REGISTER NAME⁽¹⁾ REGISTER DESCRIPTION
0x04
KEY_EVENT_A
Key event register A
7
KEA7
6
KEA6
5
KEA5
BIT
4
3
KEA4 KEA3
2
KEA2
1
KEA1
0
KEA0
(1) Only KEY_EVENT_A register is shown
These registers – KEY_EVENT_A-J – function as a FIFO stack which can store up to 10 key presses and
releases. The user first checks the INT_STAT register to see if there are any interrupts. If so, then the Key Lock
and Event Counter Register (KEY_LCK_EC, register 0x03) is read to see how many interrupts are stored. The
INT_STAT register is then read again to ensure no new events have come in. The KEY_EVENT_A register is
then read as many times as there are interrupts. Each time a read happens, the count in the KEY_LCK_EC
register reduces by 1. The data in the FIFO also moves down the stack by 1 too (from KEY_EVENT_J to
KEY_EVENT_A). Once all events have been read, the key event count is at 0 and then KE_INT bit can be
cleared by writing a ‘1’ to it.
In the KEY_EVENT_A register, KEA[6:0] indicates the key # pressed or released. A value of 0 to 80 indicate
which key has been pressed or released in a keypad matrix. Values of 97 to 114 are for GPI events.
Bit 7 or KEA[7] indicate if a key press or key release has happened. A ‘0’ means a key release happened. A ‘1’
means a key has been pressed (which can be cleared on a read).
For example, 3 key presses and 3 key releases are stored as 6 words in the FIFO. As each word is read, the
user knows if it is a key press or key release that occurred. Key presses such as CTRL+ALT+DEL are stored as
3 simultaneous key presses. Key presses and releases generate key event interrupts. The KE_INT bit and /INT
pin will not cleared until the FIFO is cleared of all events.
All registers can be read but for the purpose of the FIFO, the user should only read KEY_EVENT_A register.
Once all the events in the FIFO have been read, reading of KEY_EVENT_A register will yield a zero value.
8.6.2.5 Keypad Lock1 to Lock2 Timer Register, KP_LCK_TIMER (Address 0x0E)
ADDRESS
0x0E
Table 14. Keypad Lock1 to Lock2 Timer Register Field Descriptions
REGISTER NAME
KP_LCK_TIMER
REGISTER DESCRIPTION
BIT
7
6
5
4
3
2
1
0
Keypad lock interrupt mask timer and
lock 1 to lock 2 timer
KL7
KL6
KL5
KL4
KL3 KL2 KL1 KL0
KL[2:0] are for the Lock1 to Lock2 timer
KL[7:3] are for the interrupt mask timer
Lock1 to Lock2 timer must be non-zero for keylock to be enabled. The lock1 to lock2 bits ( KL[2:0] ) define the
time in seconds the user has to press unlock key 2 after unlock key 1 before the key lock sequence times out.
For more information, please see Keypad Lock/Unlock.
If the keypad lock interrupt mask timer is non-zero, a key event interrupt (K_INT) will be generated on any first
key press. The second interrupt (K_LCK_IN) will only be generated when the correct unlock sequence has been
completed. If either timer expires, the keylock state machine will reset.
When the interrupt mask timer is disabled (‘0’), a key lock interrupt will trigger only when the correct unlock
sequence is completed.
The interrupt mask timer should be set for the time it takes for the LCD to dim or turn off. For more information,
please see Keypad Lock Interrupt Mask Timer.
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