TCA8418E_15 Datasheet, PDF (20/50 Pages) Texas Instruments – I2C Controlled Keypad Scan IC With Integrated ESD Protection

TCA8418E
SCPS222C – MAY 2010 – REVISED OCTOBER 2015
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4. After the 10 second timer has expired, if another key press occurs while keypad is locked (regardless of
whether it is a correct unlock key or not), another interrupt is generated and the 10 second count down
begins again.
8.3.4 Control-Alt-Delete Support
The TCA8418E can support normal key presses, but it also can support a <Ctrl><Alt><Del> (CAD) key press.
This feature allows the host to recognize a specific key press and alert the host that the combination has
occurred. The TCA8418E will recognize a <Ctrl><Alt><Del> key press if keys 1, 11, and 21 are all pressed at the
same time. These keys are referenced to the key values listed in the Key Event Table. Note that this key
combination that triggers a CAD interrupt is not adjustable, and must be keys 1, 11, and 21. On the YFP
package, there is an additional CAD_INT output, which will be asserted low when the <1><11><21> keys are
pressed at the same time.
8.3.5 Interrupt Output
An interrupt is generated by any rising or falling edge of the port inputs in the input mode. After time t_iv, the signal
INT is valid. Resetting the interrupt circuit is achieved when data on the port is changed to the original setting or
data is read from the port that generated the interrupt. Resetting occurs in the read mode at the acknowledge
(ACK) or not acknowledge (NACK) bit after the rising edge of the SCL signal. Interrupts that occur during the
ACK or NACK clock pulse can be lost (or be very short) due to the resetting of the interrupt during this pulse.
Each change of the I/Os after resetting is detected and is transmitted as INT.
Reading from or writing to another device does not affect the interrupt circuit, and a pin configured as an output
cannot cause an interrupt. Changing an I/O from an output to an input may cause a false interrupt to occur, if the
state of the pin does not match the contents of the input port register.
The INT output has an open-drain structure and requires a pullup resistor to V_CC depending on the application. If
the INT signal is connected back to the processor that provides the SCL signal to the TCA8418E, then the INT
pin has to be connected to V_CC. If not, the INT pin can be connected to V_CCP.
8.3.5.1 50-µs Interrupt Configuration
The TCA8418E provides the capability of deasserting the interrupt for 50 μs while there is a pending event.
When the INT_CFG bit in Register 0x01 is set, any attempt to clear the interrupt bit while the interrupt pin is
already asserted results in a 50 μs deassertion. When the INT_CFG bit is cleared, INT remains asserted if the
host tries to clear the interrupt. This feature is particularly useful for software development and edge triggering
applications.
8.4 Device Functional Modes
8.4.1 Power-On Reset (POR)
When power (from 0 V) is applied to V_CC, an internal power-on reset circuit holds the TCA8418E in a reset
condition until V_CC has reached V_PORR. At that time, the reset condition is released, and the TCA8418E registers
and I²C/SMBus state machine initialize to their default states. After that, V_CC must be lowered to below V_PORF
and back up to the operating voltage for a power-reset cycle. See Power Supply Recommendations for more
information on power up reset requirements.
8.4.2 Powered (Key Scan Mode)
The TCA8418E can be used to read GPI from single buttons, or configured in key scan mode to read an array of
keys. In key scan mode, there are two modes of operation.
8.4.2.1 Idle Key Scan Mode
Once the TCA8418E has had the keypad array configured, it will enter idle mode when no keys are being
pressed. All columns configured as part of the keypad array will be driven low and all rows configured as part of
the keypad array will be set to inputs, with pullup resistors enabled. During idle mode, the internal oscillator is
turned off so that power consumption is low as the device awaits a key press.
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