TCA8418E_15 Datasheet, PDF (42/50 Pages) Texas Instruments – I2C Controlled Keypad Scan IC With Integrated ESD Protection

TCA8418E
SCPS222C – MAY 2010 – REVISED OCTOBER 2015
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V_{CC_GH}
V_{CC_GW}
V_PORF
V_PORR
Table 28. Recommended Supply Sequencing and Ramp Rates⁽⁾ (continued)
PARAMETER
Level that V_CCP can glitch down to, but not cause a functional
disruption when V_{CCX_GW} = 1 μs
Glitch width that will not cause a functional disruption when
V_{CCX_GH} = 0.5 × V_CCx
Voltage trip point of POR on falling V_CC
Voltage trip point of POR on rising V_CC
See Figure 38
See Figure 38
MIN TYP
0.76
1.03
MAX
1.2
10
1.15
1.43
UNIT
V
μs
V
V
Glitches in the power supply can also affect the power-on reset performance of this device. The glitch width
(V_{CC_GW}) and height (V_{CC_GH}) are dependent on each other. The bypass capacitance, source impedance, and
device impedance are factors that affect power-on reset performance. Figure 38 and Table 28 provide more
information on how to measure these specifications.
V_CC
V_{CC_GH}
Time
V_{CC_GW}
Figure 38. Glitch Width and Glitch Height
V_POR is critical to the power-on reset. V_POR is the voltage level at which the reset condition is released and all the
registers and the I²C/SMBus state machine are initialized to their default states. The value of V_POR differs based
on the V_CC being lowered to or from 0. Figure 39 and Table 28 provide more details on this specification.
V_CC
V_POR
V_PORF
POR
Time
Time
Figure 39. V_POR
For proper operation of the power-on reset feature, use as directed in the previous figures and table above.
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