DS80PCI810 Datasheet, PDF (41/60 Pages) Texas Instruments – Low-Power 8 Gbps 8-Channel Linear Repeater

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8 Applications and Implementation
DS80PCI810
SNLS493A – OCTOBER 2014 – REVISED JANUARY 2015
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 DS80PCI810 versus DS80PCI800
The DS80PCI810 and DS80PCI800 are pin compatible, and both can be used for PCIe Gen-1, 2, and 3
applications. The DS80PCI810 features several design enhancements to improve PCIe system interoperability
and performance over the previous generation DS80PCI800 design. The DS80PCI810 has a more linear input
equalizer and output driver to enhance signal transparency for protocols requiring link training. This transparency
is important, because it preserves subtle pre-cursor and post-cursor information from the Tx signal prior to the
repeater. As a result of these enhancements, the DS80PCI810 is easier to tune and increases flexibility of IC
placement along the signal path. The DS80PCI810 is ideal for open PCIe systems. An open system is defined as
an environment where a PCIe connector accepts any compliant PCIe Add-In Card (AIC). The DS80PCI810 can
extend the reach of a PCIe system by up to 10 dB beyond the max allowable PCIe channel loss.
The DS80PCI800 may still be used for closed PCIe systems where significant insertion losses (> 35 dB at 4
GHz) are expected in the signal path. In contrast to open PCIe systems, a closed system is defined as a PCIe
environment with a limited number of possible Host-to-Endpoint combinations. Due to larger CTLE gain, the
DS80PCI800 is able to compensate insertion loss over longer transmission lines before the repeater. In addition,
the DS80PCI800 is able to produce de-emphasis levels up to -12 dB to support significant trace losses after the
repeater (-15 dB at 4 GHz).
8.1.2 Signal Integrity in PCIe Applications
In PCIe Gen-3 applications, specifications require Rx-Tx link training to establish and optimize signal conditioning
settings at 8 Gbps. In link training, the Rx partner requests a series of FIR coefficients from the Tx partner at
speed. This training sequence is designed to pre-condition the signal path with an optimized link between the
endpoints. Note that there is no link training with Tx FIR coefficients for PCIe Gen-1 (2.5 Gbps) or PCIe Gen-2
(5.0 Gbps) applications.
The DS80PCI810 works to extend the reach possible by using active linear equalization on the channel, boosting
attenuated signals so that they can be more easily recovered at the Rx. The repeater outputs are specially
designed to be transparent to Tx FIR signaling in order to pass information critical for optimal link training to the
Rx. Suggested settings for the A-channels and B-channels are given in Table 10 and Table 11. Further
adjustments to EQx and VODx settings may optimize signal margin on the link for different system applications:
Table 10. Suggested Device Settings in Pin Mode
CHANNEL SETTINGS
EQx
VODx[1:0]
PIN MODE
Level 4
Level 6 (1, 0)
Table 11. Suggested Device Settings in SMBus Modes
CHANNEL SETTINGS
EQx
VODx
VOD_DB
SMBus MODES
0x03
110'b
000'b
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