DS80PCI810 Datasheet, PDF (27/60 Pages) Texas Instruments – Low-Power 8 Gbps 8-Channel Linear Repeater

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DS80PCI810
SNLS493A – OCTOBER 2014 – REVISED JANUARY 2015
Writing a Register (continued)
The WRITE transaction is completed, the bus goes IDLE, and communication with other SMBus devices may
now occur.
7.7 Reading a Register
To read a register, the following protocol is used (see SMBus 2.0 specification).
1. The Host drives a START condition, the 7-bit SMBus address, and a “0” indicating a WRITE.
2. The Device (Slave) drives the ACK bit (“0”).
3. The Host drives the 8-bit Register Address.
4. The Device drives an ACK bit (“0”).
5. The Host drives a START condition.
6. The Host drives the 7-bit SMBus Address, and a “1” indicating a READ.
7. The Device drives an ACK bit “0”.
8. The Device drives the 8-bit data value (register contents).
9. The Host drives a NACK bit “1”indicating end of the READ transfer.
10. The Host drives a STOP condition.
The READ transaction is completed, the bus goes IDLE, and communication with other SMBus devices may now
occur.
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