DS80PCI810 Datasheet, PDF (11/60 Pages) Texas Instruments – Low-Power 8 Gbps 8-Channel Linear Repeater

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DS80PCI810
SNLS493A – OCTOBER 2014 – REVISED JANUARY 2015
6.7 Electrical Characteristics — Serial Management Bus Interface
Over recommended operating supply and temperature ranges unless other specified.
PARAMETER
TEST CONDITIONS
MIN
SERIAL BUS INTERFACE DC SPECIFICATIONS
V_IL
V_IH
V_OL
V_DD
I_IH-Pin
I_IL-Pin
C_I
R_TERM
Data, Clock Input Low Voltage
Data, Clock Input High Voltage
Output Low Voltage
Nominal Bus Voltage
Input Leakage Per Device Pin
Input Leakage Per Device Pin
Capacitance for SDA and SCL
External Termination Resistance
pull to V_DD = 2.5 V ± 5% OR 3.3 V
± 10%
SDA or SCL, I_OL = 1.25 mA
See ^{(1) (2)}
Pullup V_DD = 3.3 V^(1)(2)(3)
Pullup V_DD = 2.5 V^(1)(2)(3)
2.1
0
2.375
+20
-160
(1) Recommended value.
(2) Recommended maximum capacitance load per bus segment is 400 pF.
(3) Maximum termination voltage should be identical to the device supply voltage.
TYP
<5
2000
1000
MAX UNIT
0.8
V
3.6
V
0.36
V
3.6
V
+150 µA
-40 µA
pF
Ω
Ω
6.8 Timing Requirements Serial Bus Interface
PARAMETER
TEST CONDITIONS
SERIAL BUS INTERFACE TIMING SPECIFICATIONS
F_SMB
Bus Operating Frequency
ENSMB = VDD (Slave Mode)
ENSMB = FLOAT (Master Mode)
t_FALL
SCL or SDA Fall Time
Read operation
RPU = 4.7 kΩ, Cb < 50 pF
t_RISE
t_F
t_R
t_POR
SCL or SDA Rise Time
Clock/Data Fall Time
Clock/Data Rise Time
Time in which a device must be
operational after power-on reset
Read operation
RPU = 4.7 kΩ, Cb < 50 pF
See ⁽¹⁾
See ⁽¹⁾
See ⁽¹⁾
MIN
TYP
MAX UNIT
400 kHz
280
400
520 kHz
60
ns
140
ns
300
ns
1000
ns
500 ms
(1) Compliant to SMBus 2.0 physical layer specification. See System Management Bus (SMBus) Specification Version 2.0, section 3.1.1
SMBus common AC specifications for details.
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