DS80PCI810 Datasheet, PDF (18/60 Pages) Texas Instruments – Low-Power 8 Gbps 8-Channel Linear Repeater

DS80PCI810
SNLS493A – OCTOBER 2014 – REVISED JANUARY 2015
www.ti.com
7.5 Programming
The DS80PCI810 device supports reading directly from an external EEPROM device by implementing SMBus
Master Mode. When using SMBus Master Mode, the DS80PCI810 reads directly from specific location in the
external EEPROM. When designing a system for using the external EEPROM, the user must follow these
specific guidelines.
• Maximum EEPROM size is 8K (1024 x 8-bit).
• Set ENSMB = Float — enable the SMBus Master Mode.
• The external EEPROM device address byte must be 0xA0 and capable of 1 MHz operation at 2.5 V and 3.3
V supply.
• Set the AD[3:0] inputs for SMBus address byte. When the AD[3:0] = 0000'b, the device address byte is 0xB0.
When tying multiple DS80PCI810 devices to the SDA and SCL bus, use these guidelines to configure the
devices:
• Use SMBus AD[3:0] address bits so that each device can load its configuration from the EEPROM. Example
below is for four devices. The first device in the sequence is conventionally address 0xB0, while subsequent
devices follow the address order listed below.
– U1: AD[3:0] = 0000 = 0xB0,
– U2: AD[3:0] = 0001 = 0xB2,
– U3: AD[3:0] = 0010 = 0xB4,
– U4: AD[3:0] = 0011 = 0xB6
• Use a pull-up resistor on SDA and SCL; value = 2 kΩ to 5 kΩ
• Daisy-chain READ_EN (Pin 26) and ALL_DONE (Pin 27) from one device to the next device in the sequence
so that they do not compete for the EEPROM at the same time.
1. Tie READ_EN of the first device in the chain (U1) to GND.
2. Tie ALL_DONE of U1 to READ_EN of U2.
3. Tie ALL_DONE of U2 to READ_EN of U3.
4. Tie ALL_DONE of U3 to READ_EN of U4.
5. Optional: Tie ALL_DONE output of U4 to a LED to show the devices have been loaded successfully.
Once the ALL_DONE status pin of the last device is flagged to indicate that all devices sharing the SMBus line
have been successfully programmed, control of the SMBus line is released by the repeater and the device
reverts back to SMBus Slave Mode. At this point, an external MCU can perform any additional Read or Write
operations.
Below is an example of a 2 kbits (256 x 8-bit) EEPROM in hex format for the DS80PCI810 device. The first three
bytes of the EEPROM always contain a base header common and necessary to control initialization of all
devices connected to the I2C bus. The CRC enable flag is used to enable or disable CRC checking. If CRC
checking is disabled, the CRC byte in each device's address map header is ignored to simplify control. There is a
MAP bit to flag the presence of an address map that specifies the configuration data start address in the
EEPROM. If the MAP bit is not present, the configuration data start address is assumed to follow the base
header directly. Lastly, one bit in the base header is used to indicate whether EEPROM size > 256 bytes. This bit
ensures that EEPROM slot addresses are formatted properly as one byte (EEPROM ≤ 256 bytes) or two bytes
(EEPROM > 256 bytes) for subsequent address map headers. There are 37 bytes of data for each DS80PCI810
device.
:2000000000001000000407002FAD4002FAD4002FAD4002FAD409805F5A8005F5A8005F5AD0
:200020008005F5A800005454000000000000000000000000000000000000000000000000F6
:20006000000000000000000000000000000000000000000000000000000000000000000080
:20008000000000000000000000000000000000000000000000000000000000000000000060
:2000A000000000000000000000000000000000000000000000000000000000000000000040
:2000C000000000000000000000000000000000000000000000000000000000000000000020
:2000E000000000000000000000000000000000000000000000000000000000000000000000
:200040000000000000000000000000000000000000000000000000000000000000000000A0
Note: The maximum EEPROM size supported is 8 kbits (1024 x 8 bits).
7.5.1 EEPROM Address Map for Single Device
A detailed EEPROM Address Map for a single device is shown in Table 6. For instances where multiple devices
are written to EEPROM, the device starting address definitions align starting with Table 6 Address 0x03.
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