TMDS261B Datasheet, PDF (38/48 Pages) Texas Instruments – TWO-PORT HDMI SWITCH

TMDS261B
SLLS987A – SEPTEMBER 2009 – REVISED JULY 2011
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Start
Condition
Acknowledge Acknowledge
(From Receiver) (From Transmitter)
Not Acknowledge
(Transmitter)
SDA
A6
A0 R/W ACK D7
D0 ACK
D7 D6
D1 D0 ACK
I²C Device Address and First Data Other Last Data Byte
Read/Write Bit
Byte Data Bytes
Figure 57. Multiple-Byte Read Transfer
Stop
Condition
T0398-01
Slave Address
Both SDA and SCL must be connected to a positive supply voltage via a pullup resistor. These resistors should
comply with the I²C specification that ranges from 2 kΩ to 19 kΩ. When the bus is free, both lines are high. The
address byte is the first byte received following the START condition from the master device. The 7-bit address is
factory preset to 0101 100. Table 7 lists the calls that the TMDS261B responds to.
Bit 7 (MSB)
0
Bit 6
1
Bit 5
0
Table 7. TMDS261B Slave Address
FIXED ADDRESS
Bit 4
1
Bit 3
1
Bit 2
0
Bit 1
0
READ/WRITE BIT
Bit 0 (R/W)
1/0
EXAMPLE – WRITING TO THE TMDS261B
The proper way to write to the TMDS261B is illustrated as follows:
An I²C master initiates a write operation to the TMDS261B by generating a start condition (S) followed by the
TMDS261B I²C address (as shown following, in MSB-first bit order, followed by a 0 to indicate a write cycle. After
receiving an acknowledge from the TMDS261B, the master presents the subaddress (sink port) to be written,
consisting of one byte of data, MSB-first. The TMDS261B acknowledges the byte after completion of the transfer.
Finally, the master presents the data to be written to the register (sink port), and the TMDS261B acknowledges
the byte. The master can continue presenting data to be written after TMDS261B acknowledges the previous
byte (steps 6, 7). After the last byte to be written has been acknowledged by TMDS261B, the I²C master then
terminates the write operation by generating a stop condition (P).
Step 1
0
I²C start (master)
S
Step 2
I²C general address (master)
7
6
5
4
3
2
1
0
0
1
0
1
1
0
0
0
Step 3
8
I²C acknowledge (slave)
A
Step 4
7
6
5
4
3
2
1
0
I²C write sink logic address (master)
0
0
0
0
Addr
Addr
Addr
Addr
Step 5
8
I²C acknowledge (slave)
A
Step 6
I²C write data (master)
7
Data
6
Data
5
Data
4
Data
3
Data
2
Data
1
Data
0
Data
38
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