TMDS261B Datasheet, PDF (35/48 Pages) Texas Instruments – TWO-PORT HDMI SWITCH

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HPD
5V
SDA
SOURCE
SCL
in general HDMI output ^CEC
CLK
D0
D1
D2
SINK
HPD
5V
SDA
SCL
CEC
CLK
D0
D1
D2
1kW
5V
47kW
CEC E-EDID
CEC
PHY
TMDS261B
SLLS987A – SEPTEMBER 2009 – REVISED JULY 2011
HPDx
SDAx
SCLx
Ax1/Bx1
Ax2/Bx2
Ax3/Bx3
Ax4/Bx4
VDD
VCC
(5V)
(3.3V)
EQ
S1
S2
SDA SCL
mController
CEC
LOGIC
GND
HPD_SINK
1kW
3.3V
4.7kW
SDA_SINK
SCL_SINK
4.7kW
DDC_SDA
DDC_SCL
Y1/Z1
Y2/Z2
Y3/Z3
Y4/Z4
VSadj
HDMI RX
Y1/Z1
Y2/Z2
Y3/Z3
Y4/Z4
4.02kW 10%
Figure 49. Two-Port HDMI-Enabled DTV With TMDS261B – External Logic – CEC Commands Active
I²C INTERFACE NOTES
The I²C interface is used to access the internal registers of the TMDS261B. I²C is a two-wire serial interface
developed by Philips Semiconductor (see I²C-Bus Specification, Version 2.1, January 2000). The bus consists of
a data line (SDA) and a clock line (SCL) with pullup structures. When the bus is idle, both SDA and SCL lines
are pulled high. All the I²C-compatible devices connect to the I²C bus through open-drain I/O pins, SDA and
SCL. A master device, usually a microcontroller or a digital signal processor, controls the bus. The master is
responsible for generating the SCL signal and device addresses. The master also generates specific conditions
that indicate the START and STOP of data transfer. A slave device receives and/or transmits data on the bus
under control of the master device. The TMDS261B works as a slave and supports standard-mode transfer (100
kbps).
The basic I²C start and stop access cycles are shown in Figure 50.
The basic access cycle consists of the following:
• A start condition
• A slave address cycle
• Any number of data cycles
• A stop condition
SDA
SDA
SCL
S
SCL
P
Start
Condition
Stop
Condition
T0393-01
Figure 50. I²C Start and Stop Conditions
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