TLC320AD80 Datasheet, PDF (34/37 Pages) Texas Instruments – Audio Processor Subsystem

Table A–3. Control Register 02h
D7 D6 D5 D4 D3 D2 D1 D0
FUNCTION
00––––––
50/15 µs (LRCLK = 48 kHz)
0
1
–
–
–
–
–
– _De-emphasis 50/15 µs (LRCLK = 44.1 kHz)
1 0 – – – – – – ^mode
50/15 µs (LRCLK = 32 kHz)
11––––––
None
–
–
0
–
–
–
–
– _{Wideband mux} Enabled
– – 1 – – – – – ^{output mute} Disabled
–
–
–
0
–
–
–
– _Volume/mute Zero crossing or time out
– – – 1 – – – – ^{gating enabler} Zero crossing only
– – – – x – – – Reserved
– – – – – x – – Reserved
––––––0–
Reset
––––––1–
Normal mode
Clear DAC digital filter
– – – – – – – 0 Power down Device enabled
with ext out
–
–
–
–
–
–
–
1 _mute
Device powered down
The default value at reset is 00h.
Table A–4. Left Volume Control Register (Control Register 03h)
D7 D6 D5 D4 D3 D2 D1 D0
FUNCTION
0
–
–
–
–
–
–
– _{Volume control} Ganged left/right control on left
1 – – – – – – – ^mode
Independent left/right control
–0000000
–90 dB (mute)
–0000001
–62 dB
–0000010
–61 dB
–
0
1
1
1
1
1
0
Left volume
control
–1 dB
–0111111
0 dB
–1000000
1 dB
–1000101
6 dB
– 1 0 0 0 1 1 x Reserved
– 1 1 1 1 x x x Reserved
The default value at reset is 00h.
A–3