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TLC320AD80 Datasheet, PDF (15/37 Pages) Texas Instruments – Audio Processor Subsystem
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LRCLK
Left Channel
Right Channel
BCLK
SDATA
16 Bit X X X X X X X X X X 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 X X X X X X X X 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 X
SDATA
18 Bit X X X X X X X X 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 X X X X X X 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 X
Figure 2–3. Right-Justified Serial PCM Data Format
LRCLK
Left Channel
Right Channel
BCLK
SDATA
16 Bit X X 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 X X X X X X X X 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 X X X X X X X X X
SDATA
18 Bit
X X 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 X X X X X X 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 X X X X X X X
Figure 2–4. Left-Justified DSP Serial PCM Data Format (Inverted BCLK)
Table 2–2. Control Register 00h Allowable Settings
PRECISION
16-Bit
16-Bit
16-Bit
16-Bit
16-Bit
16-Bit
16-Bit
16-Bit
18-Bit
18-Bit
18-Bit
MCLK
256
256
384
384
384
512
512
256
384
384
512
BCLK
64
32
64
48
32
64
32
64
64
48
64
DIVIDER
4
8
6
8
12
8
16
4
6
8
8
JUSTIFICATION
Left, right, I2S
Left, right, I2S
Left, right, I2S
Left, right, I2S
Left, right, I2S
Left, right, I2S
Left, right, I2S
Left, right, I2S
Left, right, I2S
Left, right, I2S
Left, right, I2S
2–4
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