SMJ320C26B Datasheet, PDF (33/40 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSOR

CLKOUT1
SMJ320C26
DIGITAL SIGNAL PROCESSOR
SGUS 016A – AUGUST 1990 – REVISED AUGUST 2001
PARAMETER MEASUREMENT INFORMATION
CLKOUT2
STRB
HOLD
td(C2H-H) (see note A)
A15–A0
N
N+1
N+2
PS, DS,
OR IS
VALID
VALID
R/W
D15–D0
HOLDA
FETCH
IN
IN
N
N+1
–
tdis(C1L-A)
tdis(AL-A)
td(C1L-AL)
–
EXECUTE
N– 2
N–1
N
–
NOTE A: HOLD is an asynchronous input that can occur at any time during a clock cycle. If the specified timing is met, the exact sequence shown
will occur; otherwise, a delay of one CLKOUT2 cycle will occur.
Figure 12. HOLD Timing (Part A)
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