SMJ320C26B Datasheet, PDF (22/40 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSOR

SMJ320C26
DIGITAL SIGNAL PROCESSOR
SGUS 016A – AUGUST 1990 – REVISED AUGUST 2001
timing requirements over recommended operating conditions (see Note 1)
MIN MAX
tc(CI)
CLKIN cycle time
25 150
tw(CIL) CLKIN low pulse duration, tc(C) = 25 ns (see Note 2)
10
15
tw(CIH) CLKIN high pulse duration, tc(CI) = 25 ns (see Note 2)
10
15
tsu(S)
SYNC setup time before CLKIN low
5 Q–5
th(S)
SYNC hold time from CLKIN low
8
NOTES: 1. Q = 1/4tc(C)
2. CLKIN duty cycle [tr(CI) + tw(CIH)]/tc(CI) must be within 40-60%. CLKIN rise and fall times must be less than 5 ns.
UNIT
ns
ns
ns
ns
ns
From Output
Under Test
IOH/IOL
Test
Point
CL = 80 pF
Figure 2. Test Load Circuit
90%
10%
0
(a) Input
VIH (MIN)
VIL (MAX)
2.4 V
2.2 V
0.8 V
0.6 V
0
(b) Outputs
Figure 3. Voltage Reference Levels
VOH (MIN)
VOL (MAX)
22
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