AM3874_16 Datasheet, PDF (321/358 Pages) Texas Instruments – Sitara ARM Processors

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AM3874, AM3871
SPRS695D – SEPTEMBER 2011 – REVISED JANUARY 2016
9.17 Peripheral Component Interconnect Express (PCIe)
The device supports connections to PCIe-compliant devices via the integrated PCIe master/slave bus
interface. The PCIe module is comprised of a dual-mode PCIe core and a SerDes PHY. The device
implements a single one-lane PCIe 2.0 (5.0 GT/s) Endpoint/Root Complex port.
The device PCIe supports the following features:
• Supports Gen1/Gen2 in x1 or x2 mode
• One port with one 5 GT/s lane
• Single virtual channel (VC), single traffic class (TC)
• Single function in end-point mode
• Automatic width and speed negotiation and lane reversal
• Max payload: 128 byte outbound, 256 byte inbound
• Automatic credit management
• ECRC generation and checking
• Configurable BAR filtering
• Supports PCIe messages
• Legacy interrupt reception (RC) and generation (EP)
• MSI generation and reception
• PCI device power management, except D3 cold with vaux
• Active state power management state L0 and L1.
For more detailed information on the PCIe port peripheral module, see the PCI Express (PCIe) Module
chapter of the AM387x Sitara™ ARM Processors Technical Reference Manual (Literature Number:
SPRUGZ7).
The PCIe peripheral on the device conforms to the PCI-Express Base 2.0 Specification.
9.17.1 PCIe Peripheral Register Descriptions
HEX ADDRESS
0x5100 0000
0x5100 0004
0x5100 0008
0x5100 000C
0x5100 0010
0x5100 0014
0x5100 0020
0x5100 0024
0x5100 0028
0x5100 0030
0x5100 0034
0x5100 0038
0x5100 003C
0x5100 0050
0x5100 0054
0x5100 0064
0x5100 0068
0x5100 006C
0x5100 0070
Table 9-88. PCIe Registers
ACRONYM
PID
CMD_STATUS
CFG_SETUP
IOBASE
TLPCFG
RSTCMD
PMCMD
PMCFG
ACT_STATUS
OB_SIZE
DIAG_CTRL
ENDIAN
PRIORITY
IRQ_EOI
MSI_IRQ
EP_IRQ_SET
EP_IRQ_CLR
EP_IRQ_STATUS
GPRO
REGISTER NAME
Peripheral Version and ID
Command Status
Config Transaction Setup
IO TLP Base
TLP Attribute Configuration
Reset Command and Status
Power Management Command
Power Management Configuration
Activity Status
Outbound Size
Diagnostic Control
Endian Mode
CBA Transaction Priority
End of Interrupt
MSI Interrupt IRQ
Endpoint Interrupt Request Set
Endpoint Interrupt Request Clear
Endpoint Interrupt Status
General Purpose 0
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