AM3874_16 Datasheet, PDF (212/358 Pages) Texas Instruments – Sitara ARM Processors

AM3874, AM3871
SPRS695D – SEPTEMBER 2011 – REVISED JANUARY 2016
www.ti.com
Table 9-5. EDMA Channel Controller (EDMA TPCC) Control Registers (continued)
HEX ADDRESS
0x4900 105C
0x4900 1060
0x4900 1064
0x4900 1068
0x4900 106C
0x4900 1070
0x4900 1074
0x4900 1078
0x4900 1080
0x4900 1084
0x4900 1088
0x4900 108C
0x4900 1090
0x4900 1094
0x4900 2000
0x4900 2004
0x4900 2008
0x4900 200C
0x4900 2010
0x4900 2014
0x4900 2018
0x4900 201C
0x4900 2020
0x4900 2024
0x4900 2028
0x4900 202C
0x4900 2030
0x4900 2034
0x4900 2038
0x4900 203C
0x4900 2040
0x4900 2044
0x4900 2050
0x4900 2054
0x4900 2058
0x4900 205C
0x4900 2060
0x4900 2064
0x4900 2068
0x4900 206C
0x4900 2070
0x4900 2074
0x4900 2078
0x4900 2080
0x4900 2084
0x4900 2088
ACRONYM
REGISTER NAME
IECRH
Interrupt Enable Clear High
IESR
Interrupt Enable Set
IESRH
Interrupt Enable Set High
IPR
Interrupt Pending
IPRH
Interrupt Pending High
ICR
Interrupt Clear
ICRH
Interrupt Clear High
IEVAL
Interrupt Evaluate
QER
QDMA Event
QEER
QDMA Event Enable
QEECR
QDMA Event Enable Clear
QEESR
QDMA Event Enable Set
QSER
QDMA Secondary Event
QSECR
QDMA Secondary Event Clear
Shadow Region 0 Channel Registers
ER
Event
ERH
Event High
ECR
Event Clear
ECRH
Event Clear High
ESR
Event Set
ESRH
Event Set High
CER
Chained Event
CERH
Chained Event High
EER
Event Enable
EERH
Event Enable High
EECR
Event Enable Clear
EECRH
Event Enable Clear High
EESR
Event Enable Set
EESRH
Event Enable Set High
SER
Secondary Event
SERH
Secondary Event High
SECR
Secondary Event Clear
SECRH
Secondary Event Clear High
IER
Interrupt Enable
IERH
Interrupt Enable High
IECR
Interrupt Enable Clear
IECRH
Interrupt Enable Clear High
IESR
Interrupt Enable Set
IESRH
Interrupt Enable Set High
IPR
Interrupt Pending
IPRH
Interrupt Pending High
ICR
Interrupt Clear
ICRH
Interrupt Clear High
IEVAL
Interrupt Evaluate
QER
QDMA Event
QEER
QDMA Event Enable
QEECR
QDMA Event Enable Clear
212 Peripheral Information and Timings
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