AM3874_16 Datasheet, PDF (156/358 Pages) Texas Instruments – Sitara ARM Processors

AM3874, AM3871
SPRS695D – SEPTEMBER 2011 – REVISED JANUARY 2016
www.ti.com
HEX
ADDRESS
REGISTER
NAME
PIN
NO.
0x4814 0BDC PINCNTL248 K22
0x4814 0BE0 PINCNTL249 K23
0x4814 0BE4 PINCNTL250 J24
0x4814 0BE8 PINCNTL251 H25
0x4814 0BEC PINCNTL252 H22
0x4814 0BF0 PINCNTL253 H23
0x4814 0BF4 PINCNTL254 G23
0x4814 0BF8 PINCNTL255 F27
0x4814 0BFC PINCNTL256 J22
0x4814 0C00 PINCNTL257 H24
0x4814 0C04 PINCNTL258 J23
0x4814 0C08 PINCNTL259 J7
0x4814 0C0C
0x4814 0C10
0x4814 0C14
0x4814 0C18
0x4814 0C1C
0x4814 0C20
0x4814 0C24
0x4814 0C28
0x4814 0C2C
0x4814 0C30
0x4814 0C34
PINCNTL260
PINCNTL261
PINCNTL262
PINCNTL263
PINCNTL264
PINCNTL265
PINCNTL266
PINCNTL267
PINCNTL268
PINCNTL269
PINCNTL270
J5
H7
K6
AC4
AB6
–
–
–
–
–
AF11
Table 5-13. PINCNTLx Registers MUXMODE Functions (continued)
REGISTER
RESET
VALUE
0x0004 0000
0x0004 0000
0x0004 0000
0x0004 0000
0x0004 0000
0x0004 0000
0x0004 0000
0x0004 0000
0x0004 0000
0x0004 0000
0x0004 0000
0x0004 0000
0x1
EMAC[0]_MRXDV/
EMAC[1]_RGRXD[1]
EMAC[0]_GMTCLK/
EMAC[1]_RGRXC
EMAC[0]_MTXD[0]/
EMAC[1]_RGRXD[3]
EMAC[0]_MTXD[1]/
EMAC[1]_RGTXD[1]
EMAC[0]_MTXD[2]/
EMAC[1]_RGTXCTL
EMAC[0]_MTXD[3]/
EMAC[1]_RGTXD[0]
EMAC[0]_MTXD[4]/
EMAC[1]_RGTXD[2]
EMAC[0]_MTXD[5]/
EMAC[1]_RGTXC
EMAC[0]_MTXD[6]/
EMAC[1]_RGRXD[0]
EMAC[0]_MTXD[7]/
EMAC[1]_RGTXD[3]
EMAC[0]_MTXEN/
EMAC[1]_RGRXD[2]
CLKIN32
0x2
EMAC[1]_RMRXD[0]^(M0)
EMAC[1]_RMRXD[1]^(M0)
EMAC[1]_RMRXER
EMAC[1]_RMCRSDV^(M0)
EMAC[1]_RMTXD[0]^(M0)
EMAC[1]_RMTXD[1]^(M0)
EMAC[1]_RMTXEN^(M0)
0x4
CLKOUT0
MUXMODE[7:0] SETTINGS
0x8
0x10
GPMC_A[5]^(M0)
GPMC_A[6]^(M0)
GPMC_A[7]^(M0)
GPMC_A[8]^(M0)
GPMC_A[9]^(M0)
GPMC_A[10]^(M0)
GPMC_A[11]^(M0)
GPMC_A[12]^(M0)
GPMC_A[13]^(M0)
GPMC_A[14]^(M0)
GPMC_A[15]^(M0)
0x000E 0000
0x000E 0000
0x0005 0000
0x000D 0000
0x000D 0000
Undetermined
Undetermined
Undetermined
Undetermined
Undetermined
0x000C 0000
RESET
NMI
RSTOUT_WD_OUT
I2C[0]_SCL
I2C[0]_SDA
Reserved. Do Not Program this Register.
Reserved. Do Not Program this Register.
Reserved. Do Not Program this Register.
Reserved. Do Not Program this Register.
Reserved. Do Not Program this Register.
USB0_DRVVBUS
GP0[7]
0x20
SPI[2]_SCLK^(M2)
SPI[2]_D[1]^(M2)
SPI[2]_D[0]^(M2)
UART4_RXD^(M1)
UART4_TXD^(M1)
UART4_CTS^(M1)
UART4_RTS^(M1)
UART1_RXD^(M1)
UART1_TXD^(M1)
UART1_CTS
UART1_RTS
0x40
TIM3_IO^(M3)
0x80
GP3[31]
156 Device Configurations
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