AM3874_16 Datasheet, PDF (195/358 Pages) Texas Instruments – Sitara ARM Processors

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AM3874, AM3871
SPRS695D – SEPTEMBER 2011 – REVISED JANUARY 2016
Table 8-19. Switching Characteristics Over Recommended Operating Conditions for CLKOUTx (CLKOUT0
and CLKOUT1)^{(1) (2)}
(see Figure 8-16)
NO.
PARAMETER
OPP100
MIN
MAX
1 t_c(CLKOUTx)
2 t_w(CLKOUTxH)
3 t_w(CLKOUTxL)
4 t_t(CLKOUTx)
Cycle time, CLKOUTx
Pulse duration, CLKOUTx high
Pulse duration, CLKOUTx low
Transition time, CLKOUTx
5
0.45P
0.45P
0.55P
0.55P
0.05P
(1) The reference points for the rise and fall transitions are measured at V_OL MAX and V_OH MIN.
(2) P = 1/CLKOUTx clock frequency in nanoseconds (ns). For example, when CLKOUTx frequency is 200 MHz, use P = 5 ns.
UNIT
ns
ns
ns
ns
CLKOUTx
(Divide-by-1)
2
1
3
Figure 8-16. CLKOUTx Timing
4
4
8.4.8 PLLs
The device contains 12 top-level PLLs, and 4 embedded PLLs (within the ARM Cortex-A8, PCIE, SATA,
and CSI) that provide clocks to different parts of the system. Figure 8-17 and Figure 8-18 show simplified
block diagrams of the Top-Level PLL and PLL_ARM. In addition, see the System Clocking Overview
(Figure 8-6) for a high-level view of the device clock architecture including the PLL reference clock
sources and connections.
DEV/AUX
Clock
1
(N + 1)
REFCLK
xM
CLKDCO ₁
Multiplier
M2
1
(N2 + 1)
CLKOUT
Figure 8-17. Top-Level PLL Simplified Block Diagram
DEV Clock
1
REFCLK
x2M
DCOCLK ₁
1
(N + 1)
Multiplier
M2
2
1
(N2 + 1)
CLKOUT
Figure 8-18. PLL_ARM Simplified Block Diagram
The reference clock for most of the PLLs comes from the DEV input clock, with select PLLs also having
the option to use the AUX input clock as a reference. Also, each PLL supports a Bypass mode in which
the reference clock can be directly passed to the PLL CLKOUT through a divider. All device PLL’s will
come-up in Bypass mode after reset.
For details on programming the device PLLs, see the Control Module chapter of the AM387x Sitara™
ARM Processors Technical Reference Manual (SPRUGZ7).
Copyright © 2011–2016, Texas Instruments Incorporated
Power, Reset, Clocking, and Interrupts 195
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