DS90UB925Q Datasheet, PDF (31/41 Pages) Texas Instruments – 5 - 85 MHz 24-bit Color FPD-Link III Serializer with Bidirectional Control Channel

DS90UB925Q
ADD
(dec)
19
20
22
23
ADD Register
(hex) Name
0x13 Mode Status
0x14
Oscillator
Clock Source
and BIST
Status
0x16 BCC
Watchdog
Control
0x17 I2C Control
Bit(s)
Register
Type
7:5
4
R
3
R
2
R
1
R
0
R
7:3
2:1
RW
0
R
7:1
RW
0
RW
7
RW
6
5:4
RW
3:0
RW
Default
(hex)
0x10
0x00
0xFE
0x5E
Function Description
Reserved
MODE_SE MODE_SEL Status
L
1: MODE_SEL decode circuit is completed
0: MODE_SEL decode circuit is not completed
Low
Low Frequency Mode Status
Frequency 1: Low frequency (5 - <15 MHz)
Mode
0: Normal frequency (15 - 85 MHz)
Repeater
Mode
Repeater Mode Status
1: Repeater mode ON
0: Repeater Mode OFF
Backward Backward Compatible Mode Status
Compatible 1: Backward compatible ON
Mode
0: Backward compatible OFF
I2S
Channel B
Mode
I2S Channel B Mode Status
1: I2S Channel B on, 18-bit RGB mode with I2S_DB
enabled
0: I2S Channel B off; normal 24-bit RGB mode
Reserved
OSC Clock OSC Clock Source
Source (When LFMODE = 1, Oscillator = 12.5MHz ONLY)
00: External Pixel Clock
01: 33 MHz Oscillator
10: Reserved
11: 25 MHz Oscillator
BIST
Enable
Status
BIST status
1: Enabled
0: Disabled
Timer
Value
The watchdog timer allows termination of a control
channel transaction if it fails to complete within a
programmed amount of time.
This field sets the Bidirectional Control Channel
Watchdog Timeout value in units of 2 ms.
This field should not be set to 0
Timer
Control
Disable Bidirectional Control Channel Watchdog
Timer
1: Disables BCC Watchdog Timer operation
0: Enables BCC Watchdog Timer operation
I2C Pass
All
I2C Control
1: Enable Forward Control Channel pass-through of
all I2C accesses to I2C Slave IDs that do not match
the Serializer I2C Slave ID.
0: Enable Forward Control Channel pass-through
only of I2C accesses to I2C Slave IDs matching
either the remote Deserializer Slave ID or the
remote Slave ID.
Reserved
SDA Hold
Time
Internal SDA Hold Time
Configures the amount of internal hold time
provided for the SDA input relative to the SCL input.
Units are 40 ns
I2C Filter
Depth
Configures the maximum width of glitch pulses on
the SCL and SDA inputs that will be rejected. Units
are 5 ns
Copyright © 1999-2012, Texas Instruments Incorporated
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