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DS90UB925Q Datasheet, PDF (10/41 Pages) Texas Instruments – 5 - 85 MHz 24-bit Color FPD-Link III Serializer with Bidirectional Control Channel
DS90UB925Q
Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the
device should not be operated beyond such conditions.
Note 2: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified or
specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.
Note 3: Typical values represent most likely parametric norms at VDD = 3.3V, Ta = +25 degC, and at the Recommended Operation Conditions at the time of
product characterization and are not guaranteed.
Note 4: Current into device pins is defined as positive. Current out of a device pin is defined as negative. Voltages are referenced to ground except VOD and
ΔVOD, which are differential voltages.
Note 5: tPLD is the time required by the device to obtain lock when exiting power-down state with an active PCLK.
Note 6: UI – Unit Interval is equivalent to one serialized data bit width (1UI = 1 / 35*PCLK). The UI scales with PCLK frequency.
Note 7: Supply noise testing was done with minimum capacitors on the PCB. A sinusoidal signal is AC coupled to the VDD33 and VDDIOsupplies with amplitude =
100 mVp-p measured at the device VDD33 and VDDIO pins. Bit error rate testing of input to the Ser and output of the Des with 10 meter cable shows no error when
the noise frequency on the Ser is less than 50MHz. The Des on the other hand shows no error when the noise frequency is less than 50 MHz.
Note 8: Specification is guaranteed by characterization and is not tested in production.
Note 9: Specification is guaranteed by design and is not tested in production.
Note 10: Jitter Frequency is specified in conjunction with DS90UB926 PLL bandwidth.
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