TL16C752CI-Q1_16 Datasheet, PDF (3/57 Pages) Texas Instruments – Dual UART

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TL16C752CI-Q1
SLLSEQ9A – OCTOBER 2015 – REVISED FEBRUARY 2016
5 Description (continued)
With the FIFO RDY register, the software gets the status of TXRDY or RXRDY for all two ports in one access.
On-chip status registers provide the user with error indications, operational status, and modem interface control.
System interrupts may be tailored to meet user requirements. An internal loop-back capability allows onboard
diagnostics. The TL16C752CI-Q1 incorporates the functionality of two UARTs, each UART having its own
register set and FIFOs. The two UARTs share only the data bus interface and clock source, otherwise they
operate independently. Another name for the UART function is asynchronous communications element (ACE),
and these terms are used interchangeably. The bulk of this document describes the behavior of each ACE, with
the understanding that two such devices are incorporated into the TL16C752CI-Q1 device.
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