TL16C752CI-Q1_16 Datasheet, PDF (14/57 Pages) Texas Instruments – Dual UART

TL16C752CI-Q1
SLLSEQ9A – OCTOBER 2015 – REVISED FEBRUARY 2016
TX (A–B)
IOW
D0–D7
TXRDY (A–B)
TXRDY
Active
Start
Bit
Data Bits (5–8)
Stop
Bit
D0
D1 D2 D3 D4 D5 D6 D7
5 Data Bits
6 Data Bits
7 Data Bits
Parity
Bit
Trigger
Level
t_28d
t_27d
Trigger
Level
Figure 9. Transmit Timing in FIFO Mode
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7.7 Typical Characteristics
all channels active, T_A = 25°C, unless otherwise noted
2
1.5
1
0.5
0
0
V_CC = 1.62 V
V_CC = 1.8 V
V_CC = 1.98 V
4
8
12
Frequency, g (MHz)
16
D001
Figure 10. Supply Current vs Frequency
(V_CC = 1.62, 1.8, and 1.98 V)
4.5
3.75
3
2.25
1.5
0.75
0
V_CC = 2.25 V
V_CC = 2.5 V
V_CC = 2.75 V
0
4
8
12
16
20
24
Frequency, g (MHz)
D002
Figure 11. Supply Current vs Frequency
(V_CC = 2.25, 2.5, and 2.75 V)
14
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