TL16C752CI-Q1_16 Datasheet, PDF (29/57 Pages) Texas Instruments – Dual UART

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TL16C752CI-Q1
SLLSEQ9A – OCTOBER 2015 – REVISED FEBRUARY 2016
8.5 Register Maps
8.5.1 Principals of Operation
Each register is selected using address lines A[0], A[1], A[2], and in some cases, bits from other registers. The
programming combinations for register selection are shown in Figure 26.
Accessible only when LCR[7] = 1
Accessible only when LCR[7:5] = 100
Accessible only when LCR = 1011 1111 (0xBF)
Accessible only when EFR[4] = 1 and MCR[6] = 1
Accessible when any CS A-B = 0, MCR[2] = 1 and loopback MCR[4] = 0 is disabled
NOTE: MCR[7:5], FCR[5:4], and IER[7:4] can only be modified when EFR[4] is set.
Figure 26. Register Map – Read and Write Properties
Table 7 lists and describes the TL16C752CI-Q1 internal registers.
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