DS90CR486_15 Datasheet, PDF (3/22 Pages) Texas Instruments – 133MHz 48-Bit Channel Link Deserializer (6.384 Gbps)

DS90CR486
www.ti.com
SNLS149C – FEBRUARY 2003 – REVISED MARCH 2013
Electrical Characteristics⁽¹⁾
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
LVCMOS/LVTTL DC SPECIFICATIONS
V_IH
High Level Input Voltage All LVCMOS/LVTTL inputs except PD .
For PD input only.
V_IL
Low Level Input Voltage
I_IN
Input Current
V_IN = 0.4V, 2.5V, or V_CC(3)
V_IN = GND
V_OH
High Level Output Voltage I_OH = −2 mA
V_OL
Low Level Output Voltage I_OL = +2 mA
I_OS
Output Short Circuit
V_OUT = 0V
Current
V_CL
Input Clamp Voltage
I_CL = −18 mA
LVDS RECEIVER DC SPECIFICATIONS
V_TH
Differential Input High
V_CM = +1.2V
Threshold
V_TL
Differential Input Low
Threshold
I_IN
Input Current
RECEIVER SUPPLY CURRENT
V_IN = +2.4V, V_CC = 3.6V
V_IN = 0V, V_CC = 3.6V
ICCRW
Receiver Supply Current
Worst Case
C_L = 8 pF, BAL = Low,
Worst Case Pattern
(Figure 1 and Figure 2)
f = 66 MHz
f = 100 MHz
f = 133 MHz
ICCRZ
Receiver Supply Current PD = Low
Power Down
Receiver Outputs stay low during Power down mode.
Min
2.0
2.5
GND
−15
2.0
−100
Typ ⁽²⁾
+1.8
0
−0.8
190
230
270
60
Max
V_CC
V_CC
0.8
+15
0.4
−120
−1.5
+100
±10
±10
245
325
340
110
Units
V
V
V
µA
µA
V
V
mA
V
mV
mV
µA
µA
mA
mA
mA
µA
(1) Current into device pins is defined as positive. Current out of device pins is defined as negative. Voltages are referenced to ground
unless otherwise specified (except V_TH, V_TL and ΔV_ID).
(2) Typical values are given for V_CC = 3.3V and T _A = +25°C.
(3) The I_IN parameter for the PD pin is not tested at 2.5V.
Receiver Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Min
Typ
CLHT
LVCMOS/LVTTL Low-to-High Transition Time, (Figure 2), Rx
0.8
data out, ⁽¹⁾
LVCMOS/LVTTL Low-to-High Transition Time, (Figure 2), Rx
0.7
clock out, ⁽¹⁾
CHLT
LVCMOS/LVTTL High-to-Low Transition Time, (Figure 2), Rx
0.9
data out, ⁽¹⁾
LVCMOS/LVTTL High-to-Low Transition Time, (Figure 2), Rx
0.8
clock out, ⁽¹⁾
RCOP
RxCLK OUT Period, (Figure 3)
7.518
T
RCOH
RxCLK OUT High Time, (Figure 3)
f = 133 MHz
2.7
f = 100 MHz
3.8
f = 66 MHz
6.0
RCOL
RxCLK OUT Low Time, (Figure 3)
f = 133 MHz
2.7
f = 100 MHz
3.8
f = 66 MHz
6.0
Max
1.3
1.0
1.3
1.0
15.152
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(1) CLHT and CHLT are measurements of the receiver data outputs low-to-high and high-to-low time over the recommended frequency
range. The limits are based on bench characterization and Specified By Design (SBD) using statistical analysis.
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