TMS320DM8127 Datasheet, PDF (286/365 Pages) Texas Instruments – DaVinci Video Processors

TMS320DM8127
SPRS712C – JUNE 2012 – REVISED MARCH 2014
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DDR[x]_D[0]
DDR2
DQ0
DDR[x]_D[7]
DDR[x]_DQM[0]
DDR[x]_DQS[0]
DDR[x]_DQS[0]
DDR[x]_D[8]
DDR[x]_D[15]
DDR[x]_DQM[1]
DDR[x]_DQS[1]
DDR[x]_DQS[1]
DDR[x]_ODT[0]
DDR[x]_ODT[1]
DDR[x]_D[16]
T0
NC
NC
DDR[x]_D[23]
DDR[x]_DQM[2]
DDR[x]_DQS[2]
DDR[x]_DQS[2]
DDR[x]_D[24]
NC
NC 1 KΩ
NC ^{1 KΩ}
DDR[x]_D[31]
DDR[x]_DQM[3]
DDR[x]_DQS[3]
DDR[x]_DQS[3]
DDR[x]_BA[0]
NC
NC ^{1 KΩ}
1 KΩ
T0
Vio 1.8^(A)
Vio 1.8^(A)
DQ7
LDM
LDQS
LDQS
DQ8
DQ15
UDM
UDQS
UDQS
ODT
BA0
DDR[x]_BA[2] T0
DDR[x]_A[0] T0
BA2
A0
DDR[x]_A[14]
DDR[x]_CS[0]
DDR[x]_CS[1]
DDR[x]_CAS
DDR[x]_RAS
DDR[x]_WE
DDR[x]_CKE
DDR[x]_CLK
DDR[x]_CLK
VREFSSTL_DDR[x]
DDR[x]_RST
DDR[x]_VTP
T0
T0
NC
T0
T0
T0
T0
T0
T0
0.1 µF^(B)
NC
50 Ω (±2%)
0.1 µF^(B)
A14
CS
CAS
RAS
WE
CKE
CK
CK
VREF VREF
0.1 µF
0.1 µF
Vio 1.8^(A)
1 K Ω 1%
VREF
1 K Ω 1%
T0 Termination is required. See terminator comments.
A. Vio1.8 is the power supply for the DDR2 memories and the DM8127 DDR2 interface.
B. One of these capacitors can be eliminated if the divider and its capacitors are placed near a VREF pin.
Figure 9-48. 16-Bit DDR2 High-Level Schematic
286 Peripheral Information and Timings
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