TMS320DM8127 Datasheet, PDF (190/365 Pages) Texas Instruments – DaVinci Video Processors

TMS320DM8127
SPRS712C – JUNE 2012 – REVISED MARCH 2014
PLL_DSP
PLL_HDVPSS
PLL_MEDIACTL
PLL_HDVICP
PLL_L3
PRCM
PRCM
www.ti.com
SYSCLK3
SYSCLK4
SYSCLK6
DSP
HDVPSS
ISS, Media Controller
HDVICP2
L3 Fast/Medium, L4 Fast,
EDMA, OCMC, MMU
L3/L4 Slow, GPMC, ELM,
McASP, McBSP,
UART3/4/5 (opt),
Mailbox, Spinlock
DEVOSC/
DEV_CLKIN
M
U
AUXOSC/
X
AUX_CLKIN
CLKDCO
PLL_USB
CLKOUT
(Note: Separate MUX
exists for each PLL)
PLL_DDR
PLL_VIDEO0
PLL_VIDEO2
M
U
HDMI PHY
X
PRCM
/2
SYSCLK10
SYSCLK8
M
U
From SYSCLK6
X
/2
USB0/1
CSI2 (embedded PLL)
SPI0/1/2/3, I2C0/1/2/3,
UART0/1/2, HDMI CEC
MMC0/1/2
UART3/4/5
DDR0/1
DMM
HDVPSS SD VENC
HDMI
HDVPSS VOUT1
M
U
PLL_VIDEO1
X
HDVPSS VOUT0
SERDES_CLK
RCOSC32K
PLL_AUDIO
From PLL_VIDEO0/1/2
PRCM
PRCM
SYSCLK20
M
SYSCLK21
U
X
M
U
From AUX Clock, AUD_CLK0/1/2
X
From PLL_AUDIO, PLL_VIDEO0/1/2, AUX Clock, AUD_CLK0/1/2
PLL_ARM
(Embedded PLL)
RTCDIVIDER
M
U
X
From CLKIN32 Pin
PRCM
SYSCLK18
M
U
From DEV/AUX Clock, AUD_CLK0/1/2, TCLKIN ^X
M
U
X
MCASP0/1/2 AUX_CLK
MCBSP CLKS,
HDMI I2S
MCASP3/4/5 AUX_CLK
Cortex-A8
RTC, GPIO, SyncTimer,
Cortex-A8 (Optional)
TIMER1/2/3/4/5/6/7/8
WDT0 (Optional)
DCAN0/1
SATA SERDES
(Embedded PLL)
EMAC Switch
PCIE SERDES
(Embedded PLL)
WDT0 (Optional)
Figure 8-6. System Clocking Overview
190 Power, Reset, Clocking, and Interrupts
Copyright © 2012–2014, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TMS320DM8127