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TMS320DM8127 Datasheet, PDF (204/365 Pages) Texas Instruments – DaVinci Video Processors
TMS320DM8127
SPRS712C – JUNE 2012 – REVISED MARCH 2014
www.ti.com
8.4.10 Module Clocks
Device Modules either receive their clock directly from an external clock input, directly from a PLL, or from
a PRCM SYSCLK output. Table 8-27 lists the clock source options for each Module on this device, along
with the maximum frequency that Module can accept. To ensure proper Module functionality, the device
PLLs and dividers must be programmed not to exceed the maximum frequencies listed in this table.
Table 8-27. Maximum Module Clock Frequencies(1)
MODULE
Cortex-A8
CSI2
DCAN0/1
DDR0
DMM
DSP
System MMU
EDMA
EMAC Switch (GMII)
EMAC Switch (RGMII)
EMAC Switch (RMII and MII)
Face Detect
GPIO
GPIO Debounce
GPMC
HDMI
HDMI CEC
HDMI I2S
HDVICP2
HDVPSS
HDVPSS VOUT1
HDVPSS VOUT0
HDVPSS SD VENC
I2C0/1/2
ISS
L3 Fast
L3 Medium
L3 Slow
L4 Fast
L4 Slow
Mailbox
McASP
CLOCK SOURCES
PLL_ARM
SYSCLK18
PLL_USB / 10
DEV Clock
PLL_DDR
PLL_DDR/2
PLL_DSP
SYSCLK4
SYSCLK4
SATA SERDES
PLL_VIDEO0
PLL_VIDEO1
PLL_VIDEO02
PLL_L3
SATA SERDES
EMAC_RMREFCLK Pin
SYSCLK4
SYSCLK6
SYSCLK18
SYSCLK6
PLL_VIDEO2
SYSCLK10
SYSCLK20
SYSCLK21
AUD_CLK0/1/2
AUX Clock
SYSCLK3
PLL_HDVPSS
PLL_VIDEO2
HDMI PHY
PLL_VIDEO1
PLL_VIDEO2
PLL_VIDEO0
SYSCLK10
PLL_ MEDIACTL
SYSCLK4
SYSCLK4
SYSCLK6
SYSCLK4
SYSCLK6
SYSCLK6
SYSCLK6
MAX FREQUENCY
OPP100 (MHz)
600
Fixed 96
30
400
200
500
200
200
Fixed 125
Fixed 250
Fixed 50
200
100
Fixed 0.032768
100
186
Fixed 48
50
266
200
186
165
Fixed 54
48
400
200
200
100
200
100
100
100
(1) The maximum frequencies listed in this table are valid for OPP100. Some of these frequencies have higher maximum values when
OPP120 or OPP166 is used, see Table 8-4
204 Power, Reset, Clocking, and Interrupts
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