LP3907_14 Datasheet, PDF (27/57 Pages) Texas Instruments – Dual High-Current Step-Down DC/DC and Dual Linear Regulator with I2C-Compatible Interface

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LP3907
SNVS511N – JUNE 2007 – REVISED AUGUST 2011
Figure 7. NPOR With Counter Delay
Case1
t1
t2
EN1
EN2
RDY1
RDY2
0V
Counter
nPOR
delay
Case2
t1
t2
EN1
EN2
RDY1
0V
RDY2
nPOR
Counter
delay
Case3
EN1
EN2
RDY1
RDY2
nPOR
t1
t2
Counter
delay
The above diagram shows the simplest application of the Power On Reset, where both switcher enables are tied
together. In Case 1, EN1 causes nPOR to transition LOW and triggers the nPOR delay counter. If the power
supply for Buck2 does not come on within that period, nPOR will stay LOW, indicating a power fail mode. Case 2
indicates the vice versa scenario if Buck1 supply did not come on. In both cases the nPOR remains LOW.
Case 3 shows a typical application of the Power On Reset, where both switcher enables are tied together. Even
if RDY1 ramps up slightly faster than RDY2 (or vice versa), then nPOR signal will trigger a programmable delay
before going HIGH, as explained below.
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